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* Make non-module passes unconditionally added in the passEric Christopher2014-07-181-15/+5
| | | | | | | manager for mips, and early exit if we don't want to do anything because of the current subtarget. llvm-svn: 213407
* Move subtarget dependent features into the subtarget from the targetEric Christopher2014-07-031-40/+1
| | | | | | | machine. Includes a fix for a subtarget initialization for hard floating point on mips16. llvm-svn: 212240
* Move the data layout and selection dag info from the mips target machineEric Christopher2014-07-021-32/+2
| | | | | | down to the subtarget. llvm-svn: 212224
* Move MipsJITInfo to the subtarget rather than the target machine.Eric Christopher2014-07-021-1/+1
| | | | llvm-svn: 212151
* Remove the cached InstrItineraryData on the TargetMachine, it's unnecessary.Eric Christopher2014-07-021-13/+10
| | | | llvm-svn: 212149
* Have MipsSelectionDAGInfo constructor take a DataLayout ratherEric Christopher2014-06-271-1/+1
| | | | | | | than a target machine since it doesn't need anything past the DataLayout. llvm-svn: 211863
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-5/+5
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+0
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* [Modules] Make Support/Debug.h modular. This requires it to not changeChandler Carruth2014-04-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | behavior based on other files defining DEBUG_TYPE, which means it cannot define DEBUG_TYPE at all. This is actually better IMO as it forces folks to define relevant DEBUG_TYPEs for their files. However, it requires all files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't already. I've updated all such files in LLVM and will do the same for other upstream projects. This still leaves one important change in how LLVM uses the DEBUG_TYPE macro going forward: we need to only define the macro *after* header files have been #include-ed. Previously, this wasn't possible because Debug.h required the macro to be pre-defined. This commit removes that. By defining DEBUG_TYPE after the includes two things are fixed: - Header files that need to provide a DEBUG_TYPE for some inline code can do so by defining the macro before their inline code and undef-ing it afterward so the macro does not escape. - We no longer have rampant ODR violations due to including headers with different DEBUG_TYPE definitions. This may be mostly an academic violation today, but with modules these types of violations are easy to check for and potentially very relevant. Where necessary to suppor headers with DEBUG_TYPE, I have moved the definitions below the includes in this commit. I plan to move the rest of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big enough. The comments in Debug.h, which were hilariously out of date already, have been updated to reflect the recommended practice going forward. llvm-svn: 206822
* Fix regression with -O0 for mips .Reed Kotler2014-03-101-0/+12
| | | | llvm-svn: 203469
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-8/+8
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Make the llvm mangler depend only on DataLayout.Rafael Espindola2014-01-031-0/+2
| | | | | | | | | | | | | | Before this patch any program that wanted to know the final symbol name of a GlobalValue had to link with Target. This patch implements a compromise solution where the mangler uses DataLayout. This way, any tool that already links with Target (llc, clang) gets the exact behavior as before and new IR files can be mangled without linking with Target. With this patch the mangler is constructed with just a DataLayout and DataLayout is extended to include the information the Mangler needs. llvm-svn: 198438
* Fix N32 registers and stack alignment.Rafael Espindola2013-12-171-1/+1
| | | | | | | | | This patch fixes the "n" and "S" components of the data layout for mips. Clang already gets this right. This will be tested in clang. llvm-svn: 197536
* The preferred alignment defaults to the abi alignment. Omit if it is the same.Rafael Espindola2013-12-161-2/+2
| | | | llvm-svn: 197400
* On DataLayout, omit the default of p:64:64:64.Rafael Espindola2013-12-161-4/+2
| | | | llvm-svn: 197397
* Move mips' datalayout computation out of line and add comments.Rafael Espindola2013-12-111-11/+31
| | | | llvm-svn: 196996
* [mips] Implement the following optimizations using dominance information toAkira Hatanaka2013-11-271-0/+6
| | | | | | | | | | | make PIC calls a little more efficient: 1. Remove instructions setting up $gp if it is known that a function has been called at least once. 2. Save the address of a called function in a register instead of loading it from the GOT at every call site. llvm-svn: 195892
* [mips] Disable tail merging when long branch pass is enabled.Akira Hatanaka2013-10-071-1/+7
| | | | llvm-svn: 192124
* [mips] Define method MipsSubtarget::enableLongBranchPass.Akira Hatanaka2013-10-071-2/+1
| | | | llvm-svn: 192122
* Turn MipsOptimizeMathLibCalls into a target-independent scalar transformRichard Sandiford2013-08-231-1/+2
| | | | | | | | | | ...so that it can be used for z too. Most of the code is the same. The only real change is to use TargetTransformInfo to test when a sqrt instruction is available. The pass is opt-in because at the moment it only handles sqrt. llvm-svn: 189097
* [mips] Implement MipsTargetMachine::getInstrItineraryData().Akira Hatanaka2013-07-121-2/+2
| | | | llvm-svn: 186227
* [mips] Add an IR transformation pass that optimizes calls to sqrt.Akira Hatanaka2013-06-111-0/+1
| | | | | | | | | The pass emits a call to sqrt that has attribute "read-none". This call will be converted to an ISD::FSQRT node during DAG construction, which will turn into a mips native sqrt instruction. llvm-svn: 183802
* Remove the MachineMove class.Rafael Espindola2013-05-131-0/+1
| | | | | | | | | | | | It was just a less powerful and more confusing version of MCCFIInstruction. A side effect is that, since MCCFIInstruction uses dwarf register numbers, calls to getDwarfRegNum are pushed out, which should allow further simplifications. I left the MachineModuleInfo::addFrameMove interface unchanged since this patch was already fairly big. llvm-svn: 181680
* Checkin in of first of several patches to finish implementation ofReed Kotler2013-05-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mips16/mips32 floating point interoperability. This patch fixes returns from mips16 functions so that if the function was in fact called by a mips32 hard float routine, then values that would have been returned in floating point registers are so returned. Mips16 mode has no floating point instructions so there is no way to load values into floating point registers. This is needed when returning float, double, single complex, double complex in the Mips ABI. Helper functions in libc for mips16 are available to do this. For efficiency purposes, these helper functions have a different calling convention from normal Mips calls. Registers v0,v1,a0,a1 are used to pass parameters instead of a0,a1,a2,a3. This is because v0,v1,a0,a1 are the natural registers used to return floating point values in soft float. These values can then be moved to the appropriate floating point registers with no extra cost. The only register that is modified is ra in this call. The helper functions make sure that the return values are in the floating point registers that they would be in if soft float was not in effect (which it is for mips16, though the soft float is implemented using a mips32 library that uses hard float). llvm-svn: 181641
* This is for an experimental option -mips-os16. The idea is to compile allReed Kotler2013-04-101-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mips32 code as Mips16 unless it can't be compiled as Mips 16. For now this would happen as long as floating point instructions are not needed. Probably it would also make sense to compile as mips32 if atomic operations are needed too. There may be other cases too. A module pass prescans the IR and adds the mips16 or nomips16 attribute to functions depending on the functions needs. Mips 16 mode can result in a 40% code compression by utililizing 16 bit encoding of many instructions. The hope is for this to replace the traditional gcc way of dealing with Mips16 code using floating point which involves essentially using soft float but with a library implemented using mips32 floating point. This gcc method also requires creating stubs so that Mips32 code can interact with these Mips 16 functions that have floating point needs. My conjecture is that in reality this traditional gcc method would never win over this new method. I will be implementing the traditional gcc method also. Some of it is already done but I needed to do the stubs to finish the work and those required this mips16/32 mixed mode capability. I have more ideas for to make this new method much better and I think the old method will just live in llvm for anyone that needs the backward compatibility but I don't for what reason that would be needed. llvm-svn: 179185
* This patch enables llvm to switch between compiling for mips32/mips64 Reed Kotler2013-04-091-6/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and mips16 on a per function basis. Because this patch is somewhat involved I have provide an overview of the key pieces of it. The patch is written so as to not change the behavior of the non mixed mode. We have tested this a lot but it is something new to switch subtargets so we don't want any chance of regression in the mainline compiler until we have more confidence in this. Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1. For that reason there are derived versions of the register info, frame info, instruction info and instruction selection classes. Now we register three separate passes for instruction selection. One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and MipsSEISelDAGToDAG.cpp). When the ModuleISel pass runs, it determines if there is a need to switch subtargets and if so, the owning pointers in MipsTargetMachine are appropriately changed. When 16Isel or SEIsel is run, they will return immediately without doing any work if the current subtarget mode does not apply to them. In addition, MipsAsmPrinter needs to be reset on a function basis. The pass BasicTargetTransformInfo is substituted with a null pass since the pass is immutable and really needs to be a function pass for it to be used with changing subtargets. This will be fixed in a follow on patch. llvm-svn: 179118
* [mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is forAkira Hatanaka2013-03-131-1/+1
| | | | | | | | mips16 and MipsSETargetLowering is for mips32/64. No functionality changes. llvm-svn: 176917
* Add the skeleton for the Mips constant island pass.Reed Kotler2013-02-271-0/+2
| | | | | | | It will only be used for Mips 16 at this time. llvm-svn: 176161
* Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth2013-01-071-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a TargetMachine to construct (and thus isn't always available), to an analysis group that supports layered implementations much like AliasAnalysis does. This is a pretty massive change, with a few parts that I was unable to easily separate (sorry), so I'll walk through it. The first step of this conversion was to make TargetTransformInfo an analysis group, and to sink the nonce implementations in ScalarTargetTransformInfo and VectorTargetTranformInfo into a NoTargetTransformInfo pass. This allows other passes to add a hard requirement on TTI, and assume they will always get at least on implementation. The TargetTransformInfo analysis group leverages the delegation chaining trick that AliasAnalysis uses, where the base class for the analysis group delegates to the previous analysis *pass*, allowing all but tho NoFoo analysis passes to only implement the parts of the interfaces they support. It also introduces a new trick where each pass in the group retains a pointer to the top-most pass that has been initialized. This allows passes to implement one API in terms of another API and benefit when some other pass above them in the stack has more precise results for the second API. The second step of this conversion is to create a pass that implements the TargetTransformInfo analysis using the target-independent abstractions in the code generator. This replaces the ScalarTargetTransformImpl and VectorTargetTransformImpl classes in lib/Target with a single pass in lib/CodeGen called BasicTargetTransformInfo. This class actually provides most of the TTI functionality, basing it upon the TargetLowering abstraction and other information in the target independent code generator. The third step of the conversion adds support to all TargetMachines to register custom analysis passes. This allows building those passes with access to TargetLowering or other target-specific classes, and it also allows each target to customize the set of analysis passes desired in the pass manager. The baseline LLVMTargetMachine implements this interface to add the BasicTTI pass to the pass manager, and all of the tools that want to support target-aware TTI passes call this routine on whatever target machine they end up with to add the appropriate passes. The fourth step of the conversion created target-specific TTI analysis passes for the X86 and ARM backends. These passes contain the custom logic that was previously in their extensions of the ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces. I separated them into their own file, as now all of the interface bits are private and they just expose a function to create the pass itself. Then I extended these target machines to set up a custom set of analysis passes, first adding BasicTTI as a fallback, and then adding their customized TTI implementations. The fourth step required logic that was shared between the target independent layer and the specific targets to move to a different interface, as they no longer derive from each other. As a consequence, a helper functions were added to TargetLowering representing the common logic needed both in the target implementation and the codegen implementation of the TTI pass. While technically this is the only change that could have been committed separately, it would have been a nightmare to extract. The final step of the conversion was just to delete all the old boilerplate. This got rid of the ScalarTargetTransformInfo and VectorTargetTransformInfo classes, all of the support in all of the targets for producing instances of them, and all of the support in the tools for manually constructing a pass based around them. Now that TTI is a relatively normal analysis group, two things become straightforward. First, we can sink it into lib/Analysis which is a more natural layer for it to live. Second, clients of this interface can depend on it *always* being available which will simplify their code and behavior. These (and other) simplifications will follow in subsequent commits, this one is clearly big enough. Finally, I'm very aware that much of the comments and documentation needs to be updated. As soon as I had this working, and plausibly well commented, I wanted to get it committed and in front of the build bots. I'll be doing a few passes over documentation later if it sticks. Commits to update DragonEgg and Clang will be made presently. llvm-svn: 171681
* [mips] Fix data layout string. Add 64 to the list of native integer widthsAkira Hatanaka2013-01-051-4/+6
| | | | | | and add stack alignment information. llvm-svn: 171587
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+1
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Remove TargetELFWriterInfo.Rafael Espindola2012-10-281-1/+1
| | | | | | All the credit goes to Jan Voung for noticing it was dead! llvm-svn: 166902
* Implement a basic VectorTargetTransformInfo interface to be used by the loop ↵Nadav Rotem2012-10-241-1/+1
| | | | | | and bb vectorizers for modeling the cost of instructions. llvm-svn: 166593
* Reapply the TargerTransformInfo changes, minus the changes to LSR and ↵Nadav Rotem2012-10-181-1/+1
| | | | | | Lowerinvoke. llvm-svn: 166248
* Temporarily revert the TargetTransform changes.Bob Wilson2012-10-181-1/+1
| | | | | | | | | | | The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 llvm-svn: 166168
* Add a new interface to allow IR-level passes to access codegen-specific ↵Nadav Rotem2012-10-101-1/+1
| | | | | | information. llvm-svn: 165665
* Move TargetData to DataLayout.Micah Villmow2012-10-081-1/+1
| | | | llvm-svn: 165402
* Add register Mips::GP to the list of reserved registers if target is bare-metalAkira Hatanaka2012-08-221-1/+1
| | | | | | | | to prevent it from being clobbered. mips uses $gp to access small data section. This bug was originally reported by Carl Norum. llvm-svn: 162340
* Reorder initialization list to silence -WreorderCraig Topper2012-08-181-2/+2
| | | | llvm-svn: 162165
* Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka2012-08-171-0/+1
| | | | | | | | | | No new tests are added. All tests in ExecutionEngine/MCJIT that have been failing pass after this patch is applied (when "make check" is done on a mips board). Patch by Petar Jovanovic. llvm-svn: 162135
* Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka2012-08-021-29/+4
| | | | | | of MipsTargetMachine.cpp. llvm-svn: 161191
* Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka2012-07-311-3/+17
| | | | | | | | | | MipsSEFrameLowering. Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be reserved if there is a call with a large call frame or there are variable sized objects on the stack. llvm-svn: 161090
* Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka2012-07-311-1/+14
| | | | | | and MipsSEInstrInfo (for mips32/64). llvm-svn: 161081
* Delete mips64 target machine classes. mips target machines can be used in placeAkira Hatanaka2012-07-311-20/+2
| | | | | | of them. llvm-svn: 161080
* Add all codegen passes to the PassManager via TargetPassConfig.Bob Wilson2012-07-021-3/+3
| | | | | | | | This is a preliminary step toward having TargetPassConfig be able to start and stop the compilation at specified passes for unit testing and debugging. No functionality change. llvm-svn: 159567
* Add long branch expansion pass for MIPS.Akira Hatanaka2012-06-141-1/+7
| | | | llvm-svn: 158433
* Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo.Akira Hatanaka2012-05-251-6/+0
| | | | | | Delete MipsExpandPseudo. llvm-svn: 157495
* Do not add the pass which restores $gp after every function call.Akira Hatanaka2012-05-121-9/+0
| | | | llvm-svn: 156693
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-8/+6
| | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 llvm-svn: 155902
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
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