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path: root/llvm/lib/Target/Mips/MipsTargetMachine.cpp
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* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-051-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
* Some Mips minor fixesBruno Cardoso Lopes2008-06-041-5/+24
| | | | | | Added support for mips little endian arch => mipsel llvm-svn: 51923
* Clean up the use of static and anonymous namespaces. This turned upDan Gohman2008-05-131-4/+2
| | | | | | | several things that were neither in an anonymous namespace nor static but not intended to be global. llvm-svn: 51017
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-111-3/+3
| | | | | | | | that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. llvm-svn: 48256
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Added support for PIC code with "explicit relocations" *only*.Bruno Cardoso Lopes2007-11-051-0/+5
| | | | | | | Removed all macro code for PIC (goodbye "la"). Support tested with shootout bench. llvm-svn: 43697
* Position Independent Code (PIC) support [2]Bruno Cardoso Lopes2007-10-091-1/+5
| | | | | | | | | | - Added a function to hold the stack location where GP must be stored during LowerCALL - AsmPrinter now emits directives based on relocation type - PIC_ set to default relocation type (same as GCC) llvm-svn: 42779
* Added method to get Mips register numbersBruno Cardoso Lopes2007-08-281-4/+5
| | | | | | | Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack. Stack offset calculation bug fixed! llvm-svn: 41529
* createMipsDelaySlotFillerPass added to mips codegen runtime Bruno Cardoso Lopes2007-08-181-2/+2
| | | | llvm-svn: 41154
* Now that stack is represented the right way, LOA starts at 0Bruno Cardoso Lopes2007-07-111-6/+7
| | | | llvm-svn: 39761
* The various "getModuleMatchQuality" implementations should returnChris Lattner2007-07-091-3/+4
| | | | | | zero if they see a target triple they don't understand. llvm-svn: 38463
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-061-0/+81
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461
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