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path: root/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
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* SDAG: Implement Select instead of SelectImpl in MipsDAGToDAGISelJustin Bogner2016-05-131-32/+33
* [mips] Use range-based for loops and simplify slightly the code. NFC.Vasileios Kalintiris2016-04-151-9/+13
* Revert "[mips] Promote the result of SETCC nodes to GPR width."Vasileios Kalintiris2016-03-011-3/+17
* [mips] Promote the result of SETCC nodes to GPR width.Vasileios Kalintiris2016-03-011-17/+3
* [mips] Check the register class before replacing materializations of zero wit...Vasileios Kalintiris2015-10-291-0/+5
* [mips] Remove incorrect DebugLoc entries from prologuePetar Jovanovic2015-08-281-1/+1
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-091-1/+1
* [mips] Correct and improve special-case shuffle instructions.Daniel Sanders2015-05-191-9/+10
* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-281-21/+25
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-281-25/+21
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-281-21/+25
* [mips] Support 9-bit offsets for the 'R' inline assembly memory constraint.Daniel Sanders2015-03-301-1/+14
* [mips] Support 16-bit offsets for 'm' inline assembly memory constraint.Daniel Sanders2015-03-241-1/+9
* [mips] Distinguish 'R', 'ZC', and 'm' inline assembly memory constraint.Daniel Sanders2015-03-241-0/+68
* [mips] Account for constant-zero operands in ADDE nodes.Vasileios Kalintiris2015-02-271-2/+6
* [mips] Refactor and simplify MipsSEDAGToDAGISel::selectIntAddrLSL2MM(). NFC.Vasileios Kalintiris2015-02-131-9/+6
* [mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructionsZoran Jovanovic2015-02-041-0/+25
* Get rid of a few calls through the subtarget to get the ABIEric Christopher2015-01-291-5/+5
* Remove most of the TargetMachine::getSubtarget/getSubtargetImplEric Christopher2015-01-291-2/+2
* [mips] Enable arithmetic and binary operations for the i128 data type.Vasileios Kalintiris2015-01-261-4/+24
* Revert "[mips] Fix assertion on i128 addition/subtraction on MIPS64"Vasileios Kalintiris2015-01-261-27/+5
* [mips] Fix assertion on i128 addition/subtraction on MIPS64Daniel Sanders2015-01-241-5/+27
* Remove a bunch of unnecessary typecasts to 'const TargetRegisterClass *'Craig Topper2014-11-211-4/+1
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+1
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+2
* Fundamentally change the MipsSubtarget replacement machinery:Eric Christopher2014-07-181-0/+1
* Make it possible for the Subtarget to change between functionEric Christopher2014-07-101-12/+12
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-6/+6
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* [mips] Some uses of isMips64()/hasMips64() are really tests for 64-bit GPR'sDaniel Sanders2014-03-271-1/+1
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-1/+1
* [Modules] Move CFG.h to the IR library as it defines graph traits overChandler Carruth2014-03-041-1/+1
* [mips] Prevent %lo relocation being used on MSA loads and stores.Daniel Sanders2014-03-031-38/+65
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
* [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code fo...Daniel Sanders2013-11-181-0/+5
* [mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. n...Daniel Sanders2013-11-121-0/+21
* [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. ...Daniel Sanders2013-10-301-10/+64
* [mips] Define a pseudo instruction which writes to both the lower and higherAkira Hatanaka2013-10-151-13/+0
* [mips] Rename isel nodes.Akira Hatanaka2013-10-151-1/+1
* [mips][msa] Added support for matching splati from normal IR (i.e. not intrin...Daniel Sanders2013-09-271-0/+10
* [mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_V...Daniel Sanders2013-09-241-0/+217
* Test commit to verify that commit access works.Zoran Jovanovic2013-09-131-1/+1
* [mips][msa] Added load/store intrinsics.Daniel Sanders2013-08-281-0/+14
* [mips][msa] Added move.vDaniel Sanders2013-08-281-0/+16
* [mips][msa] Added cfcmsa, and ctcmsaDaniel Sanders2013-08-281-0/+48
* [Mips] Support for unaligned load/store microMips instructionsJack Carter2013-08-131-0/+31
* [mips] Rename accumulator register classes and FP register operands.Akira Hatanaka2013-08-081-2/+2
* [mips] Delete register class HWRegs64.Akira Hatanaka2013-08-081-4/+2
* [mips] Rename register classes CPURegs and CPU64Regs.Akira Hatanaka2013-08-061-2/+2
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-1/+1
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