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path: root/llvm/lib/Target/Mips/MipsRegisterInfo.h
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* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-4/+0
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+3
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+1
* Reverse unnecessary changes made in r129606 and r129608. There is no change i...Akira Hatanaka2011-04-151-3/+3
* Fix lines that have incorrect indentation or exceed 80 columns. There is no c...Akira Hatanaka2011-04-151-3/+3
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by H...Bruno Cardoso Lopes2011-03-041-1/+1
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-2/+0
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou...Anton Korobeynikov2010-11-151-3/+0
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-3/+2
* cleanupRafael Espindola2010-06-021-3/+0
* SubRegIndex'ize MipsJakob Stoklund Olesen2010-05-241-9/+0
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
* - Add sugregister logic to handle f64=(f32,f32).Bruno Cardoso Lopes2009-11-191-0/+9
* Make the MachineFunction argument of getFrameRegister const.David Greene2009-11-121-1/+1
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-2/+3
* This void is implicit in C++.Dan Gohman2009-08-121-1/+1
* Added support for fp callee saved registers.Bruno Cardoso Lopes2008-08-061-0/+3
* Added Subtarget support into RegisterInfoBruno Cardoso Lopes2008-07-141-2/+7
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-3/+0
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-2/+2
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-10/+0
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-26/+0
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-2/+2
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-13/+3
* Allow some reloads to be folded in multi-use cases. Specifically testl r, r -...Evan Cheng2007-12-011-1/+15
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+2
* Added support for PIC code with "explicit relocations" *only*.Bruno Cardoso Lopes2007-11-051-3/+1
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but o...Evan Cheng2007-10-181-2/+2
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister p...Evan Cheng2007-10-181-4/+4
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-0/+10
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-1/+2
* Add a variant of foldMemoryOperand to fold any load / store, not just load / ...Evan Cheng2007-08-301-0/+5
* Added method to get Mips register numbersBruno Cardoso Lopes2007-08-281-2/+7
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-2/+3
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-061-0/+83
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