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path: root/llvm/lib/Target/Mips/MipsMachineFunction.h
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* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-311-13/+1
| | | | | | | The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. llvm-svn: 161076
* Eliminate the stack slot used to save the global base register.Akira Hatanaka2012-07-251-20/+1
| | | | | | | | The long branch pass (fixed in r160601) no longer uses the global base register to compute addresses of branch destinations, so it is not necessary to reserve a slot on the stack. llvm-svn: 160703
* Add methods to MipsFunctionInfo for initializing and accessing the stack frameAkira Hatanaka2012-06-141-1/+23
| | | | | | | | | object for the global base register. This is the first of a series of patches which implements long branch expansion for MIPS. llvm-svn: 158427
* Delete all functions that are no longer needed in MipsFunctionInfo, includingAkira Hatanaka2012-05-121-8/+1
| | | | | | | | | the ones that get or set the frame index for the $gp save slot. Remove the piece of code in MipsFunctionInfo::getGlobalBaseReg() which returns GP. This function should always return a virtual register. llvm-svn: 156695
* Add member EmitNOAT and its setter and getter functions to class ↵Akira Hatanaka2012-03-271-1/+6
| | | | | | | | | MipsFunctionInfo. If EmitNOAT is true, directives ".set noat" and ".set at" are emitted at the beginning and end of a function. llvm-svn: 153528
* Prune some includesCraig Topper2012-03-271-1/+0
| | | | llvm-svn: 153502
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* remove blanks, and some code formatJia Liu2012-02-281-4/+4
| | | | llvm-svn: 151625
* Add an option to use a virtual register as the global base register instead ofAkira Hatanaka2012-02-241-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | reserving a physical register ($gp or $28) for that purpose. This will completely eliminate loads that restore the value of $gp after every function call, if the register allocator assigns a callee-saved register, or eliminate unnecessary loads if it assigns a temporary register. example: .cpload $25 // set $gp. ... .cprestore 16 // store $gp to stack slot 16($sp). ... jalr $25 // function call. clobbers $gp. lw $gp, 16($sp) // not emitted if callee-saved reg is chosen. ... lw $2, 4($gp) ... jalr $25 // function call. lw $gp, 16($sp) // not emitted if $gp is not live after this instruction. ... llvm-svn: 151402
* Remove VectorExtras. This unused helper was written for a type of API that ↵Benjamin Kramer2012-01-071-1/+0
| | | | | | is discouraged now. llvm-svn: 147738
* Unweaken vtables as per ↵David Blaikie2011-12-201-1/+1
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Remove variable that keeps the size of area used to save byval or variableAkira Hatanaka2011-11-141-10/+1
| | | | | | | | | | | argument registers on the callee's stack frame, along with functions that set and get it. It is not necessary to add the size of this area when computing stack size in emitPrologue, since it has already been accounted for in PEI::calculateFrameObjectOffsets. llvm-svn: 144549
* Define functions that get or set the size of area on callee's stack frame whichAkira Hatanaka2011-11-071-1/+10
| | | | | | is used to save va_arg or byval arguments passed in registers. llvm-svn: 143992
* Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from Akira Hatanaka2011-07-181-8/+1
| | | | | | | | moving them out of the loop. Previously, stores and loads to a stack frame object were inserted to accomplish this. Remove the code that was needed to do this. Patch by Sasa Stankovic. llvm-svn: 135415
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-211-3/+15
| | | | llvm-svn: 133494
* Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.Eric Christopher2011-06-091-15/+3
| | | | llvm-svn: 132777
* Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of theAkira Hatanaka2011-06-081-3/+15
| | | | | | dynamically allocated stack area was not set. llvm-svn: 132758
* This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,Bruno Cardoso Lopes2011-05-311-1/+10
| | | | | | | | | | nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions. The intrinsics are implemented by creating pseudo-instructions, which are then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter. Patch by Sasa Stankovic. llvm-svn: 132323
* Use MachineFrameInfo::hasCalls instead of MipsFunctionInfo::hasCall to check ifAkira Hatanaka2011-05-261-6/+1
| | | | | | a function has any function calls. llvm-svn: 132140
* Change initial value of MaxCallFrameSize. MipsFI::getMaxCallFrameSize() shouldAkira Hatanaka2011-05-251-4/+4
| | | | | | return 0 if there are no function calls made. llvm-svn: 132065
* Fix MipsAsmPrinter::printSavedRegsBitmaskChange. Remove functions and variablesAkira Hatanaka2011-05-231-15/+1
| | | | | | in MipsFunctionInfo that are no longer used. llvm-svn: 131917
* Change StackDirection from StackGrowsUp to StackGrowsDown.Akira Hatanaka2011-05-231-59/+4
| | | | | | | | | | | | | | | | The following improvements are accomplished as a result of applying this patch: - Fixed frame objects' offsets (relative to either the virtual frame pointer or the stack pointer) are set before instruction selection is completed. There is no need to wait until Prologue/Epilogue Insertion is run to set them. - Calculation of final offsets of fixed frame objects is straightforward. It is no longer necessary to assign negative offsets to fixed objects for incoming arguments in order to distinguish them from the others. - Since a fixed object has its relative offset set during instruction selection, there is no need to conservatively set its alignment to 4. - It is no longer necessary to reorder non-fixed frame objects in MipsFrameLowering::adjustMipsStackFrame. llvm-svn: 131915
* Define functions that get/set maximum call frame size.Akira Hatanaka2011-05-201-1/+6
| | | | llvm-svn: 131752
* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-201-15/+1
| | | | | | saving and restoring them. llvm-svn: 131745
* Remove noisy semicolons.Benjamin Kramer2011-05-201-1/+1
| | | | llvm-svn: 131724
* Define variables and functions in MipsFunctionInfo.Akira Hatanaka2011-05-201-1/+30
| | | | | | | This is the first of a series of patches that attempt to simplify handling of stack frame objects. llvm-svn: 131710
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-151-3/+3
| | | | | | in functionality. llvm-svn: 129612
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-151-3/+3
| | | | | | change in functionality. llvm-svn: 129606
* Remove trailing spaces of MipsMachineFunction.hChe-Liang Chiou2010-09-281-17/+17
| | | | llvm-svn: 114948
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-171-1/+8
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Fix PR5149.Bruno Cardoso Lopes2009-11-091-0/+1
| | | | | | http://llvm.org/bugs/show_bug.cgi?id=5149 llvm-svn: 86543
* Major calling convention code refactoring.Dan Gohman2009-08-051-2/+2
| | | | | | | | | | | | | | | | | | | Instead of awkwardly encoding calling-convention information with ISD::CALL, ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering provides three virtual functions for targets to override: LowerFormalArguments, LowerCall, and LowerRet, which replace the custom lowering done on the special nodes. They provide the same information, but in a more immediately usable format. This also reworks much of the target-independent tail call logic. The decision of whether or not to perform a tail call is now cleanly split between target-independent portions, and the target dependent portion in IsEligibleForTailCallOptimization. This also synchronizes all in-tree targets, to help enable future refactoring and feature work. llvm-svn: 78142
* Convert Alpha and Mips to use a MachineFunctionInfo subclass toDan Gohman2009-06-031-1/+9
| | | | | | | | | | carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This eliminates the need for them to search through the MachineRegisterInfo livein list in order to identify these virtual registers. EmitLiveInCopies is now the only user of the virtual register portion of MachineRegisterInfo's livein data. llvm-svn: 72802
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-0/+1
| | | | llvm-svn: 61715
* Added support for fp callee saved registers.Bruno Cardoso Lopes2008-08-061-11/+20
| | | | | | | | | | | | | | | | | | | | | Added fp register clobbering during calls. Added AsmPrinter support for "fmask", a bitmask that indicates where on the stack the fp callee saved registers are. Fixed the stack frame layout for Mips, now the callee saved regs are in the right stack location (a little documentation about how this stack frame must look like is present in MipsRegisterInfo.cpp). This was done using the method MipsRegisterInfo::adjustMipsStackFrame To be more clear, these are examples of what is solves : 1) FP and RA are also callee saved, and despite they aren't in CSI they must be saved before the fp callee saved registers. 2) The ABI requires that local varibles are allocated before the callee saved register area, the opposite behavior from the default allocation. 3) CPU and FPU saved register area must be aligned independent of each other. llvm-svn: 54403
* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-051-18/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Added support for PIC code with "explicit relocations" *only*.Bruno Cardoso Lopes2007-11-051-8/+12
| | | | | | | Removed all macro code for PIC (goodbye "la"). Support tested with shootout bench. llvm-svn: 43697
* Position Independent Code (PIC) support [2]Bruno Cardoso Lopes2007-10-091-0/+8
| | | | | | | | | | - Added a function to hold the stack location where GP must be stored during LowerCALL - AsmPrinter now emits directives based on relocation type - PIC_ set to default relocation type (same as GCC) llvm-svn: 42779
* Added methods to record SPOffsets from LowerFORMAL_ARGUMENTSBruno Cardoso Lopes2007-08-281-3/+53
| | | | llvm-svn: 41525
* Added MipsMachineFunction class, to hold Mips dinamic stack info when ↵Bruno Cardoso Lopes2007-07-111-0/+54
inserting Prologue/Epilog llvm-svn: 39758
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