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path: root/llvm/lib/Target/Mips/MipsInstrInfo.cpp
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* Add MachineMemOperands to instructions generated in storeRegToStackSlot orAkira Hatanaka2011-12-241-2/+16
* Tidy up. Simplify logic. No functional change intended.Akira Hatanaka2011-12-191-15/+15
* Emit B (unconditional branch) when -relocation-model=pic and J (jump) whenAkira Hatanaka2011-12-121-8/+9
* Use branches instead of jumps + variable cleanup. Testcase coming next. Patch...Bruno Cardoso Lopes2011-12-061-6/+6
* Add code needed for copying between 64-bit integer and floating pointerAkira Hatanaka2011-11-071-0/+6
* Add support for conditional branch instructions with 64-bit register operands.Akira Hatanaka2011-10-111-11/+20
* Make changes necessary for supporting floating point load and store instructionsAkira Hatanaka2011-10-111-6/+18
* Simplify and update functions storeRegToStackSlot and loadRegFromStackSlot.Akira Hatanaka2011-10-111-17/+23
* Simplify definition of FP move instructions.Akira Hatanaka2011-10-081-1/+1
* Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integerAkira Hatanaka2011-10-031-51/+44
* Revert r140731, "Define classes for unary and binary FP instructions and use ...Jakob Stoklund Olesen2011-09-281-1/+1
* Define classes for unary and binary FP instructions and use them to defineAkira Hatanaka2011-09-281-1/+1
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
* Fix handling of double precision loads and stores when Mips1 is targeted. Akira Hatanaka2011-08-161-26/+4
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-11/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-1/+12
* Lower MachineInstr to MC Inst and print to .s files. Akira Hatanaka2011-07-071-0/+6
* Reverse order of operands of address operand mem so that the base operand comesAkira Hatanaka2011-07-071-18/+18
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-2/+2
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-011-0/+9
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-1/+2
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-281-0/+2
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-2/+2
* Reverse unnecessary changes made in r129606 and r129608. There is no change i...Akira Hatanaka2011-04-151-10/+9
* Fix lines that have incorrect indentation or exceed 80 columns. There is no c...Akira Hatanaka2011-04-151-9/+10
* Add code for analyzing FP branches. Clean up branch Analysis functions.Akira Hatanaka2011-04-011-207/+128
* Added support for FP conditional move instructions and fixed bugs in handling...Akira Hatanaka2011-03-311-5/+5
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by H...Bruno Cardoso Lopes2011-03-041-37/+37
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-47/+0
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-74/+0
* Replace copyRegToReg with copyPhysReg for Mips.Jakob Stoklund Olesen2010-07-111-50/+64
* Use COPY in targetsJakob Stoklund Olesen2010-07-101-6/+2
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-9/+8
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-5/+4
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
* No-ops emitted for scheduling don't correspond with anything in theDan Gohman2010-05-051-1/+0
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-5/+5
* Teach AnalyzeBranch, RemoveBranch and the branchDale Johannesen2010-04-021-1/+14
* load f64 +0.0 in a cleaner way. This fix part of PR5445Bruno Cardoso Lopes2010-01-191-9/+0
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-16/+0
* Add proper emission of load/store double to stack slots for mips1 targets!Bruno Cardoso Lopes2009-11-251-21/+43
* Support fp64 immediate zero, this fixes only part of PR5445 Bruno Cardoso Lopes2009-11-131-3/+12
* Remove unused member functions.Eli Friedman2009-07-241-45/+0
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-2/+2
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-2/+3
* Silence a warning when assertions are turned off.Duncan Sands2009-07-031-0/+1
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-011-4/+10
* Convert Alpha and Mips to use a MachineFunctionInfo subclass toDan Gohman2009-06-031-0/+29
* Added support for fround, fextend and FP_TO_SINTBruno Cardoso Lopes2009-05-271-10/+15
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-6/+6
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