| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips][PR19612] Fix va_arg for big-endian mode. | Daniel Sanders | 2014-08-01 | 1 | -0/+1 |
| * | In preparation for replacing the whole subtarget on the target machine, | Eric Christopher | 2014-07-18 | 1 | -4/+8 |
| * | The subtarget in MipsTargetLowering isn't going to change and | Eric Christopher | 2014-07-18 | 1 | -1/+1 |
| * | So that we can include target lowering in the subtarget, remove include | Eric Christopher | 2014-07-02 | 1 | -7/+1 |
| * | [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6. | Daniel Sanders | 2014-06-16 | 1 | -0/+6 |
| * | [mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available ... | Daniel Sanders | 2014-06-12 | 1 | -0/+1 |
| * | [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final... | Craig Topper | 2014-04-29 | 1 | -45/+44 |
| * | Start pushing changes for Mips Fast-Isel | Reed Kotler | 2014-04-17 | 1 | -0/+10 |
| * | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper | 2014-04-04 | 1 | -2/+2 |
| * | [mips] Rewrite MipsAsmParser and MipsOperand. | Daniel Sanders | 2014-04-01 | 1 | -0/+3 |
| * | Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot errors... | Daniel Sanders | 2014-03-31 | 1 | -3/+0 |
| * | [mips] Rewrite MipsAsmParser and MipsOperand. | Daniel Sanders | 2014-03-31 | 1 | -0/+3 |
| * | Fixed issue with microMIPS JAL instruction. | Zoran Jovanovic | 2014-03-31 | 1 | -3/+0 |
| * | [mips] Some uses of isMips64()/hasMips64() are really tests for 64-bit GPR's | Daniel Sanders | 2014-03-27 | 1 | -0/+1 |
| * | [mips] Stop caching the result of hasMips64(), isABI_O32(), isABI_N32(), and ... | Daniel Sanders | 2014-03-27 | 1 | -2/+3 |
| * | Change @llvm.clear_cache default to call rt-lib | Renato Golin | 2014-03-26 | 1 | -5/+0 |
| * | [mips] The decision to use MO_GOT_PAGE and MO_GOT_OFST depends on the ABI bei... | Daniel Sanders | 2014-03-26 | 1 | -4/+6 |
| * | Add @llvm.clear_cache builtin | Renato Golin | 2014-03-26 | 1 | -0/+5 |
| * | Implementation of microMIPS 16-bit instructions MOVE and JALR. | Zoran Jovanovic | 2014-03-20 | 1 | -0/+3 |
| * | Re-sort all of the includes with ./utils/sort_includes.py so that | Chandler Carruth | 2014-01-07 | 1 | -1/+1 |
| * | Support for microMIPS LL and SC instructions. | Zoran Jovanovic | 2013-12-19 | 1 | -0/+1 |
| * | [mips] Rename isel nodes. | Akira Hatanaka | 2013-10-15 | 1 | -3/+3 |
| * | [mips] Fix definition of mfhi and mflo instructions to read from the whole | Akira Hatanaka | 2013-10-07 | 1 | -1/+2 |
| * | [mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted out | Akira Hatanaka | 2013-09-28 | 1 | -6/+8 |
| * | [mips] Rewrite MipsTargetLowering::getAddr functions as template functions. | Akira Hatanaka | 2013-09-27 | 1 | -6/+84 |
| * | Revert r191350. | Akira Hatanaka | 2013-09-25 | 1 | -8/+3 |
| * | [mips] Define getTargetNode as a template function. | Akira Hatanaka | 2013-09-25 | 1 | -3/+8 |
| * | [mips][msa] Added support for matching pckev, and pckod from normal IR (i.e. ... | Daniel Sanders | 2013-09-24 | 1 | -0/+2 |
| * | [mips][msa] Added support for matching ilv[lr], ilvod, and ilvev from normal ... | Daniel Sanders | 2013-09-24 | 1 | -0/+4 |
| * | [mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics) | Daniel Sanders | 2013-09-24 | 1 | -0/+1 |
| * | [mips][msa] Added support for matching vshf from normal IR (i.e. not intrinsics) | Daniel Sanders | 2013-09-24 | 1 | -0/+3 |
| * | [mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_V... | Daniel Sanders | 2013-09-24 | 1 | -6/+0 |
| * | [mips][msa] Added support for matching max, maxi, min, mini from normal IR (i... | Daniel Sanders | 2013-09-24 | 1 | -0/+6 |
| * | [mips][msa] Added support for matching comparisons from normal IR (i.e. not i... | Daniel Sanders | 2013-09-24 | 1 | -0/+8 |
| * | [mips][msa] Added support for matching insert and copy from normal IR (i.e. n... | Daniel Sanders | 2013-09-23 | 1 | -0/+4 |
| * | [mips][msa] Added support for matching nor from normal IR (i.e. not intrinsics) | Daniel Sanders | 2013-09-23 | 1 | -0/+3 |
| * | [mips][msa] Implemented build_vector using ldi, fill, and custom SelectionDAG... | Daniel Sanders | 2013-09-23 | 1 | -1/+7 |
| * | [mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double | Akira Hatanaka | 2013-09-07 | 1 | -2/+3 |
| * | [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v | Daniel Sanders | 2013-08-28 | 1 | -0/+6 |
| * | [mips] Add support for calling convention CC_MipsO32_FP64, which is used when... | Akira Hatanaka | 2013-08-20 | 1 | -4/+3 |
| * | [mips] Properly parse registers that appear in inline-asm constraints. | Akira Hatanaka | 2013-08-14 | 1 | -0/+5 |
| * | Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s... | Craig Topper | 2013-07-14 | 1 | -1/+1 |
| * | Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ... | Craig Topper | 2013-07-03 | 1 | -1/+1 |
| * | The getRegForInlineAsmConstraint function should only accept MVT value types. | Chad Rosier | 2013-06-22 | 1 | -1/+1 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 | 1 | -7/+7 |
| * | Add LLVMContext argument to getSetCCResultType | Matt Arsenault | 2013-05-18 | 1 | -1/+1 |
| * | [mips] Improve instruction selection for pattern (store (fp_to_sint $src), $p... | Akira Hatanaka | 2013-05-16 | 1 | -0/+4 |
| * | [mips] Delete unused enum value. | Akira Hatanaka | 2013-05-16 | 1 | -3/+0 |
| * | Checkin in of first of several patches to finish implementation of | Reed Kotler | 2013-05-10 | 1 | -2/+12 |
| * | [mips] Instruction selection patterns for DSP-ASE vector select and compare | Akira Hatanaka | 2013-04-30 | 1 | -0/+4 |
