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llvm-svn: 132768
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llvm-svn: 132725
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- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.
llvm-svn: 132724
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llvm-svn: 132448
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Dynamic, Initial Exec and Local Exec TLS models.
Patch by Sasa Stankovic
llvm-svn: 132322
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Need this to prevent emitting illegal conditional move instructions.
llvm-svn: 132240
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in functionality.
llvm-svn: 129612
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change in functionality.
llvm-svn: 129606
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selection to Legalize phase.
llvm-svn: 128830
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llvm-svn: 128751
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llvm-svn: 128750
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right after the code that is removed.
llvm-svn: 128742
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llvm-svn: 127034
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Patch by Akira Hatanaka
llvm-svn: 127027
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Hatanaka, Akira
llvm-svn: 127003
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new gcc warning that complains on self-assignments and
self-initializations.
llvm-svn: 122458
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something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
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llvm-svn: 118864
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passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
llvm-svn: 114471
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llvm-svn: 112919
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llvm-svn: 111468
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llvm-svn: 104514
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
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DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
llvm-svn: 97555
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
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fixes PR6192
llvm-svn: 94977
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in use by Mips.
llvm-svn: 93897
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the instruction to load those args removed. This fix PR6071
llvm-svn: 93880
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llvm-svn: 93876
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clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
llvm-svn: 92564
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llvm-svn: 89863
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using two swc/lwc instead of sdc/ldc.
llvm-svn: 89826
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- Support mips1 like load/store of doubles:
Instead of:
sdc $f0, X($3)
Generate:
swc $f0, X($3)
swc $f1, X+4($3)
llvm-svn: 89322
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- Add a smarter constant pool loading, instead of:
lui $2, %hi($CPI1_0)
addiu $2, $2, %lo($CPI1_0)
lwc1 $f0, 0($2)
Generate:
lui $2, %hi($CPI1_0)
lwc1 $f0, %lo($CPI1_0)($2)
llvm-svn: 88886
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because the testcase is triggering one more bug.
llvm-svn: 88674
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llvm-svn: 86149
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
llvm-svn: 82790
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Add MO flags to simplify the printing of relocations.
Remove the support for printing large code model relocs (which
aren't supported anyway).
llvm-svn: 80691
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llvm-svn: 80280
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Add MO flags to simplify the printing of relocations.
Remove the support for printing large code model relocs (which
aren't supported anyway).
llvm-svn: 80278
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- The world needs better C++ refactoring tools, can I get an Amen!?
llvm-svn: 79843
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llvm-svn: 79833
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while
the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
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own struct type.
llvm-svn: 78610
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llvm-svn: 77768
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Finish converting lib/Target.
llvm-svn: 75043
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carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.
llvm-svn: 72802
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llvm-svn: 72705
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