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path: root/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
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* [mips] Deal with empty blocks in the mips hazard schedulerSimon Dardis2017-04-041-11/+14
| | | | | | | | | | | | This patch teaches the hazard scheduler how to handle empty blocks when search for the next real instruction when dealing with forbidden slots. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D31293 llvm-svn: 299427
* Spelling mistakes in comments. NFCI.Simon Pilgrim2017-03-301-1/+1
| | | | | | Based on corrections mentioned in patch for clang for PR27635 llvm-svn: 299072
* [mips] Fix compact branch hazard detection, part 2Petar Jovanovic2016-12-221-22/+15
| | | | | | | | | | | Follow up to D27209 fix, this patch now properly handles single transient instruction in basic block. Patch by Aleksandar Beserminji. Differential Revision: https://reviews.llvm.org/D27856 llvm-svn: 290361
* [mips] Fix comment to respect 80 chars per line; NFCSimon Dardis2016-12-131-6/+6
| | | | llvm-svn: 289530
* [mips] Fix compact branch hazard detectionSimon Dardis2016-12-131-22/+42
| | | | | | | | | | | | | In certain cases it is possible that transient instructions such as %reg = IMPLICIT_DEF as a single instruction in a basic block to reach the MipsHazardSchedule pass. This patch teaches MipsHazardSchedule to properly look through such cases. Reviewers: vkalintiris, zoran.jovanovic Differential Revision: https://reviews.llvm.org/D27209 llvm-svn: 289529
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* Reapply "Mips: Avoid implicit iterator conversions, NFC"Duncan P. N. Exon Smith2016-07-151-2/+2
| | | | | | | | | | This reverts commit r275562, effectively reapplying r275141. Doug Gilmore reported that there was an error when bisecting the Mips buildbot failure, and that r275141 was not to blame after all. Here is the green build: https://dmz-portal.mips.com/bb/builders/LLVM%20with%20integrated%20assembler%20and%20fPIC%20and%20-O0/builds/803 llvm-svn: 275643
* Revert r275141 - Mips: Avoid implicit iterator conversions, NFCDaniel Sanders2016-07-151-2/+2
| | | | | | It appears to have caused some failures in our buildbots. llvm-svn: 275562
* Mips: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-121-2/+2
| | | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr* in the Mips backend, mainly by preferring MachineInstr& over MachineInstr* when a pointer isn't nullable and using range-based for loops. llvm-svn: 275141
* Untabify.NAKAMURA Takumi2016-06-201-2/+2
| | | | llvm-svn: 273129
* [PATCH] [mips] Fix forbidden slot hazard handlingSimon Dardis2016-04-291-3/+11
| | | | | | | | | | | | | | | | | | MipsHazardSchedule has to determine what the next physical machine instruction is to decide whether to insert a nop. In case where a branch with a forbidden slot appears at the end of a basic block, first *real* instruction of the next physical basic block was determined using getFirstNonDebugInstr(). Unfortunately this only considers DBG_VALUEs and not other transient opcodes such as EHLABEL. As EHLABEL passes the SafeInForbiddenSlot predicate and the instruction after the EHLABEL can be a CTI, we observed test failures in the LNT testsuite. Reviewers: dsanders Differential Review: http://reviews.llvm.org/D19051 llvm-svn: 268052
* [NFC] Header cleanupMehdi Amini2016-04-181-2/+1
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+5
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* [Mips] Fix -Wunused-private-field warning after r263444.Chad Rosier2016-03-141-5/+4
| | | | llvm-svn: 263454
* [mips] MIPS32R6 compact branch supportDaniel Sanders2016-03-141-0/+136
Summary: MIPSR6 introduces a class of branches called compact branches. Unlike the traditional MIPS branches which have a delay slot, compact branches do not have a delay slot. The instruction following the compact branch is only executed if the branch is not taken and must not be a branch. It works by generating compact branches for MIPS32R6 when the delay slot filler cannot fill a delay slot. Then, inspecting the generated code for forbidden slot hazards (a compact branch with an adjacent branch or other CTI) and inserting nops to clear this hazard. Patch by Simon Dardis. Reviewers: vkalintiris, dsanders Subscribers: MatzeB, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D16353 llvm-svn: 263444
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