[PATCH] [mips] Fix forbidden slot hazard handling

MipsHazardSchedule has to determine what the next physical machine instruction
is to decide whether to insert a nop. In case where a branch with a forbidden
slot appears at the end of a basic block, first *real* instruction of the next
physical basic block was determined using getFirstNonDebugInstr().

Unfortunately this only considers DBG_VALUEs and not other transient opcodes
such as EHLABEL. As EHLABEL passes the SafeInForbiddenSlot predicate and the
instruction after the EHLABEL can be a CTI, we observed test failures in the
LNT testsuite.

Reviewers: dsanders

Differential Review: http://reviews.llvm.org/D19051

llvm-svn: 268052

1 files changed, 11 insertions, 3 deletions

diff --git a/llvm/lib/Target/Mips/MipsHazardSchedule.cpp b/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
index e35f32035c1..edd176548c5 100644
--- a/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
+++ b/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
@@ -91,6 +91,14 @@ FunctionPass *llvm::createMipsHazardSchedule() {
   return new MipsHazardSchedule();
 }
 
+// Find the next real instruction from the current position.
+static Iter getNextMachineInstr(Iter Position) {
+  Iter I = Position, E = Position->getParent()->end();
+  I = std::find_if_not(I, E, [](const Iter &Insn) { return Insn->isTransient(); });
+  assert(I != E);
+  return I;
+}
+
 bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
 
   const MipsSubtarget *STI =
@@ -113,14 +121,14 @@ bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
       bool InsertNop = false;
       // Next instruction in the basic block.
       if (std::next(I) != FI->end() &&
-          !TII->SafeInForbiddenSlot(*std::next(I))) {
+          !TII->SafeInForbiddenSlot(*getNextMachineInstr(std::next(I)))) {
         InsertNop = true;
       } else {
         // Next instruction in the physical successor basic block.
         for (auto *Succ : FI->successors()) {
           if (FI->isLayoutSuccessor(Succ) &&
-              Succ->getFirstNonDebugInstr() != Succ->end() &&
-              !TII->SafeInForbiddenSlot(*Succ->getFirstNonDebugInstr())) {
+              getNextMachineInstr(Succ->begin()) != Succ->end() &&
+              !TII->SafeInForbiddenSlot(*getNextMachineInstr(Succ->begin()))) {
             InsertNop = true;
             break;
           }