| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 150805
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llvm-svn: 148918
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- Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit.
- Change the types of variables so that they are sufficiently large to handle
64-bit pointers.
- Emit instructions to set register $28 in a function prologue after
instructions which store callee-saved registers have been emitted.
llvm-svn: 148917
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change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
llvm-svn: 145714
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registers and instructions when ABI is N64.
llvm-svn: 144666
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register.
llvm-svn: 144665
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argument registers on the callee's stack frame, along with functions that set
and get it.
It is not necessary to add the size of this area when computing stack size in
emitPrologue, since it has already been accounted for in
PEI::calculateFrameObjectOffsets.
llvm-svn: 144549
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
llvm-svn: 144414
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llvm-svn: 144367
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llvm-svn: 143993
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warning.
llvm-svn: 137378
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better location welcome).
llvm-svn: 135438
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- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.
llvm-svn: 132724
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MipsFrameLowering::emitPrologue:
- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
callee-saved register is emitted even when no callee-saved registers are
saved.
- When a callee-saved double precision register is saved, two cfi_offset
directives, one for each of the paired single precision registers, should be
emitted.
llvm-svn: 132703
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llvm-svn: 132444
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a function has any function calls.
llvm-svn: 132140
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llvm-svn: 132131
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return 0 if there are no function calls made.
llvm-svn: 132065
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offsets that are larger than 0x10000.
llvm-svn: 132003
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The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
the stack pointer) are set before instruction selection is completed. There is
no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
no longer necessary to assign negative offsets to fixed objects for incoming
arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in
MipsFrameLowering::adjustMipsStackFrame.
llvm-svn: 131915
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llvm-svn: 131784
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saving and restoring them.
llvm-svn: 131745
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in functionality.
llvm-svn: 129612
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change in functionality.
llvm-svn: 129606
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Luis Felipe Strano Moraes!
llvm-svn: 129558
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llvm-svn: 129105
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llvm-svn: 129104
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llvm-svn: 127038
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16-bit field. Patch by Akira Hatanaka
llvm-svn: 127032
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Stankovic
llvm-svn: 123768
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llvm-svn: 123399
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and fixes here and there.
llvm-svn: 123170
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