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path: root/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
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* Have getCalleeSavedRegs take a non-null MachineFunction all theEric Christopher2015-03-111-1/+2
| | | | | | | | time. The target independent code was passing in one all the time and targets weren't checking validity before using. Update a few calls to pass in a MachineFunction where necessary. llvm-svn: 231970
* DataLayout is mandatory, update the API to reflect it with references.Mehdi Amini2015-03-101-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Now that the DataLayout is a mandatory part of the module, let's start cleaning the codebase. This patch is a first attempt at doing that. This patch is not exactly NFC as for instance some places were passing a nullptr instead of the DataLayout, possibly just because there was a default value on the DataLayout argument to many functions in the API. Even though it is not purely NFC, there is no change in the validation. I turned as many pointer to DataLayout to references, this helped figuring out all the places where a nullptr could come up. I had initially a local version of this patch broken into over 30 independant, commits but some later commit were cleaning the API and touching part of the code modified in the previous commits, so it seemed cleaner without the intermediate state. Test Plan: Reviewers: echristo Subscribers: llvm-commits From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 231740
* [mips] Keep the parameter list of Filler::searchRange() consistent. NFC.Vasileios Kalintiris2015-03-041-9/+9
| | | | | | | | | | | | | | Summary: Move the "Filler" parameter to the end of the parameter list as it is, conceptually, the only output parameter of that function. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7726 llvm-svn: 231239
* [mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRCJozef Kolek2015-02-131-10/+43
| | | | | | | | | | | This patch adds functionality in MIPS delay slot filler such as if delay slot filler have to put NOP instruction into the delay slot of microMIPS JR instruction, then instead of emitting NOP this instruction is replaced by compact jump instruction JRC. Differential Revision: http://reviews.llvm.org/D7522 llvm-svn: 229128
* Use the function template getSubtarget off of the machine function,Eric Christopher2015-02-021-13/+10
| | | | | | and use it in all locations. llvm-svn: 227890
* Remove most of the TargetMachine::getSubtarget/getSubtargetImplEric Christopher2015-01-291-20/+17
| | | | | | | | | calls that don't take a Function argument from Mips. Notable exceptions: the AsmPrinter and MipsTargetObjectFile. The latter needs to be fixed, and the former will be fixed when the general AsmPrinter changes happen. llvm-svn: 227512
* [mips][microMIPS] Fix issue with 16b instructions in jr instruction delay slotJozef Kolek2015-01-131-5/+16
| | | | | | | | | 16 bit instructions are not allowed in jr delay slot. Same stands for PseudoIndirectBranch and PseudoReturn. Differential Revision: http://reviews.llvm.org/D6815 llvm-svn: 225798
* [mips][micromips] Use call instructions with short delay slotsZoran Jovanovic2014-11-251-21/+49
| | | | | | Differential Revision: http://reviews.llvm.org/D6338 llvm-svn: 222752
* [mips][microMIPS] This patch implements functionality in MIPS delay slotJozef Kolek2014-11-211-5/+43
| | | | | | | | | | | filler such as if delay slot filler have to put NOP instruction into the delay slot of microMIPS BEQ or BNE instruction which uses the register $0, then instead of emitting NOP this instruction is replaced by the corresponding microMIPS compact branch instruction, i.e. BEQZC or BNEZC. Differential Revision: http://reviews.llvm.org/D3566 llvm-svn: 222580
* Update SetVector to rely on the underlying set's insert to return a ↵David Blaikie2014-11-191-1/+2
| | | | | | | | | | | | | pair<iterator, bool> This is to be consistent with StringSet and ultimately with the standard library's associative container insert function. This lead to updating SmallSet::insert to return pair<iterator, bool>, and then to update SmallPtrSet::insert to return pair<iterator, bool>, and then to update all the existing users of those functions... llvm-svn: 222334
* [mips][microMIPS] Fix issue with delay slot filler and microMIPSZoran Jovanovic2014-11-101-11/+19
| | | | | | Differential Revision: http://reviews.llvm.org/D6193 llvm-svn: 221612
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-9/+14
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, ↵Daniel Sanders2014-06-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ddiv, divu, ddivu for MIPS32r6/MIPS64. Summary: The accumulator-based (HI/LO) multiplies and divides from earlier ISA's have been removed and replaced with GPR-based equivalents. For example: div $1, $2 mflo $3 is now: div $3, $1, $2 This patch disables the accumulator-based multiplies and divides for MIPS32r6/MIPS64r6 and uses the GPR-based equivalents instead. Renamed expandPseudoDiv to insertDivByZeroTrap to better describe the behaviour of the function. MipsDelaySlotFiller now invalidates the liveness information when moving instructions to the delay slot. Without this, divrem.ll will abort since %GP ends up used before it is defined. Reviewers: vmedic, zoran.jovanovic, jkolek Reviewed By: jkolek Differential Revision: http://reviews.llvm.org/D3896 llvm-svn: 210760
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-6/+6
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-7/+7
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* [C++11] Replace OwningPtr with std::unique_ptr in places where it doesn't ↵Benjamin Kramer2014-04-211-1/+1
| | | | | | | | break the API. No functionality change. llvm-svn: 206740
* Break PseudoSourceValue out of the Value hierarchy. It is now the root of ↵Nick Lewycky2014-04-151-20/+28
| | | | | | its own tree containing FixedStackPseudoSourceValue (which you can use isa/dyn_cast on) and MipsCallEntry (which you can't). Anything that needs to use either a PseudoSourceValue* and Value* is strongly encouraged to use a MachinePointerInfo instead. llvm-svn: 206255
* [mips] Implement NaCl sandboxing of loads, stores and SP changes:Sasa Stankovic2014-03-101-0/+13
| | | | | | | | | | * Add masking instructions before loads and stores (in MC layer). * Add masking instructions after SP changes (in MC layer). * Forbid loads, stores and SP changes in delay slots (in MI layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2904 llvm-svn: 203484
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label. The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping. The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function. I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better. The net result is that we don't create temporary labels that are never used. llvm-svn: 203204
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-7/+7
| | | | | | Remove the old functions. llvm-svn: 202636
* Now that we have C++11, turn simple functors into lambdas and remove a ton ↵Benjamin Kramer2014-03-011-16/+6
| | | | | | | | of boilerplate. No intended functionality change. llvm-svn: 202588
* [mips] Coding style clean up.Akira Hatanaka2013-10-071-14/+12
| | | | llvm-svn: 192125
* [mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted outAkira Hatanaka2013-09-281-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | of loops. Previously, two consecutive calls to function "func" would result in the following sequence of instructions: 1. load $16, %got(func)($gp) // load address of lazy-binding stub. 2. move $25, $16 3. jalr $25 // jump to lazy-binding stub. 4. nop 5. move $25, $16 6. jalr $25 // jump to lazy-binding stub again. With this patch, the second call directly jumps to func's address, bypassing the lazy-binding resolution routine: 1. load $25, %got(func)($gp) // load address of lazy-binding stub. 2. jalr $25 // jump to lazy-binding stub. 3. nop 4. load $25, %got(func)($gp) // load resolved address of func. 5. jalr $25 // directly jump to func. llvm-svn: 191591
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ↵Craig Topper2013-07-031-2/+2
| | | | | | specifying the vector size. llvm-svn: 185540
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-2/+3
| | | | | | the internals of TargetMachine could change. llvm-svn: 183493
* Fix comment.Akira Hatanaka2013-03-251-3/+3
| | | | llvm-svn: 177899
* [mips] Remove unused option. Fix 80-column violations.Akira Hatanaka2013-03-011-16/+8
| | | | llvm-svn: 176330
* [mips] Add the capability to search delay slot filling instructions inAkira Hatanaka2013-03-011-32/+303
| | | | | | | | successor basic blocks. Currently this is off by default. llvm-svn: 176329
* [mips] Add options to disable searching backward and in successor blocks.Akira Hatanaka2013-03-011-0/+12
| | | | llvm-svn: 176321
* [mips] Add capability to search in the forward direction for instructions thatAkira Hatanaka2013-03-011-23/+92
| | | | | | | | can fill the delay slot. Currently, this is off by default. llvm-svn: 176320
* [mips] Define helper function searchRangeAkira Hatanaka2013-03-011-9/+29
| | | | | | No functionality change. llvm-svn: 176318
* [mips] Rename function findDelayInstr to searchBackward.Akira Hatanaka2013-03-011-3/+3
| | | | llvm-svn: 176317
* [mips] Define class MemDefsUses.Akira Hatanaka2013-03-011-23/+126
| | | | | | | This class tracks dependence between memory instructions using underlying objects of memory operands. llvm-svn: 176313
* [mips] Use class RegDefsUses to track register defs and uses.Akira Hatanaka2013-02-261-89/+82
| | | | | | No functionality change. llvm-svn: 176070
* [mips] Disallow moving load/store instructions past volatile instructions.Akira Hatanaka2013-02-141-1/+1
| | | | | | | Unfortunately, I wasn't able to create a test case that demonstrates the problem I was trying to fix with this patch. llvm-svn: 175226
* [mips] Replace usage of SmallSet with BitVector, which is used to keep track ofAkira Hatanaka2013-02-141-86/+83
| | | | | | | defined and used registers. Also add a few helper functions to simplify the code. llvm-svn: 175224
* [mips] Fix comments and coding style violations. Declare functions to be const.Akira Hatanaka2013-02-141-64/+47
| | | | llvm-svn: 175222
* [mips] Simplify code in function Filler::findDelayInstr.Akira Hatanaka2013-02-141-38/+29
| | | | | | | | 1. Define and use function terminateSearch. 2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator. 3. Delete the line which checks whether an instruction is a pseudo. llvm-svn: 175219
* [mips] Make Filler a class and reduce indentation.Akira Hatanaka2013-02-071-34/+38
| | | | llvm-svn: 174666
* Use the new MIBundleBuilder class in the Mips target.Jakob Stoklund Olesen2012-12-071-4/+4
| | | | | | This is the preferred way of creating bundled machine instructions. llvm-svn: 169585
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* [mips] Fix delay slot filler so that instructions with register operand $1 areAkira Hatanaka2012-11-161-17/+34
| | | | | | allowed in branch delay slot. llvm-svn: 168131
* Disable Mips' delay slot filler when optimization level is O0.Akira Hatanaka2012-08-241-1/+3
| | | | llvm-svn: 162589
* Add option disable-mips-delay-filler. Turn on mips' delay slot filler byAkira Hatanaka2012-08-221-4/+5
| | | | | | | | default. Patch by Carl Norum. llvm-svn: 162339
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-8/+8
| | | | llvm-svn: 158471
* Bundle jump/branch instructions with the instructions in the delay slot inAkira Hatanaka2012-06-131-16/+22
| | | | | | | | | delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen. This change, along with the fix in r158154, enables machine verification to be run after delay slot filling. llvm-svn: 158426
* Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen2012-06-011-7/+4
| | | | | | | MCRegAliasIterator can optionally visit the register itself, allowing for simpler code. llvm-svn: 157837
* Add a command line option to skip the delay slot filler pass entirely for Mips.Akira Hatanaka2012-05-141-0/+10
| | | | | | | | | | The purpose of this option is to silence error messages issued by machine verifier passes and enable them to run to the end. If this option is not provided, -verify-machineinstrs complains when it discovers there is a non-terminator instruction (an instruction that is in a delay slot) after the first terminator in a basic block. llvm-svn: 156790
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
| | | | llvm-svn: 152001
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