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path: root/llvm/lib/Target/Mips/MipsCondMov.td
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* Add another peephole pattern for conditional moves.Akira Hatanaka2012-05-091-0/+10
| | | | llvm-svn: 156460
* Add disassembler to MIPS. Akira Hatanaka2012-04-171-14/+34
| | | | | | Patch by Vladimir Medic. llvm-svn: 154935
* Revert r153924. There were buildbot failures.Akira Hatanaka2012-04-031-34/+14
| | | | llvm-svn: 153925
* MIPS disassembler support.Akira Hatanaka2012-04-031-14/+34
| | | | | | Patch by Vladimir Medic. llvm-svn: 153924
* remove blanks, and some code formatJia Liu2012-02-281-1/+1
| | | | llvm-svn: 151625
* add Emacs tag and fix some comment error in file headersJia Liu2012-02-171-0/+13
| | | | llvm-svn: 150775
* Final patch that completes old JIT support for Mips:Bruno Cardoso Lopes2011-10-181-2/+4
| | | | | | | | | | | | | | | | -Fix binary codes and rename operands in .td files so that automatically generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct encoding for instructions. -Define new class FMem for instructions that access memory. -Define new class FFRGPR for instructions that move data between GPR and FPU general and control registers. -Define custom encoder methods for memory operands, and also for size operands of ext and ins instructions. -Only static relocation model is currently implemented. Patch by Sasa Stankovic llvm-svn: 142378
* Add definitions of conditional moves with 64-bit operands. Comment out code forAkira Hatanaka2011-10-171-55/+127
| | | | | | | expanding conditional moves, which is not needed since architectures that lack support for conditional moves have been removed. llvm-svn: 142226
* Move class and instruction definitions for conditional moves to a seperate file.Akira Hatanaka2011-10-171-0/+107
llvm-svn: 142220
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