| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. | Craig Topper | 2014-11-26 | 1 | -8/+8 |
| * | Fix typos in comments, NFC | Robin Morisset | 2014-08-29 | 1 | -2/+2 |
| * | [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not a... | Daniel Sanders | 2014-07-09 | 1 | -3/+5 |
| * | [mips][sched] Split IIStore into II_S[BHWD], II_S[WD][LR], and II_SAVE | Daniel Sanders | 2014-01-23 | 1 | -6/+6 |
| * | [mips][sched] Split IILoad into II_L[BHWD], II_L[BHW]U, II_L[WD][LR], and II_... | Daniel Sanders | 2014-01-21 | 1 | -10/+10 |
| * | Adjust offsets for max load instruction offsets. This is more pessimistic | Reed Kotler | 2014-01-16 | 1 | -0/+2 |
| * | Get rid of an superfluous tab in the .s file. This was originally | Reed Kotler | 2013-12-15 | 1 | -1/+1 |
| * | Last change for mips16 prolog/epilog cleanup and optimization. | Reed Kotler | 2013-12-15 | 1 | -2/+4 |
| * | Cleaning up of prologue/epilogue code for Mips16. First step | Reed Kotler | 2013-12-08 | 1 | -29/+15 |
| * | Correct word hyphenations | Alp Toker | 2013-12-05 | 1 | -1/+1 |
| * | Part 1 of 3 patches that completes very long conditional branches | Reed Kotler | 2013-11-29 | 1 | -0/+15 |
| * | Add, to constant islands, long jumps similar to ARM far branch. | Reed Kotler | 2013-11-21 | 1 | -0/+1 |
| * | Make all the conditional Mips 16 branches get initially set for the | Reed Kotler | 2013-11-15 | 1 | -4/+16 |
| * | Change the default branch instruction to be the 16 bit variety for mips16. | Reed Kotler | 2013-11-12 | 1 | -1/+19 |
| * | Fix r194019 as requested by Eric Christopher. | Reed Kotler | 2013-11-05 | 1 | -1/+9 |
| * | Revert r194019 to r194021, "Submit the basic port of the rest of ARM constant... | NAKAMURA Takumi | 2013-11-04 | 1 | -9/+1 |
| * | Submit the basic port of the rest of ARM constant islands code to Mips. | Reed Kotler | 2013-11-04 | 1 | -1/+9 |
| * | Prune utf8 chars in comments. | NAKAMURA Takumi | 2013-10-28 | 1 | -3/+3 |
| * | Prune trailing linefeeds. | NAKAMURA Takumi | 2013-10-28 | 1 | -1/+0 |
| * | Make first substantial checkin of my port of ARM constant islands code to Mips. | Reed Kotler | 2013-10-27 | 1 | -3/+25 |
| * | For Mips16, start to consolidate all forms of 32 bit literal loading so that | Reed Kotler | 2013-10-12 | 1 | -3/+1 |
| * | Add Mips16 patterns for sign extend byte and sign extend halfword. | Reed Kotler | 2013-10-07 | 1 | -0/+30 |
| * | Support tblockaddr for static compilation in Mips16. | Reed Kotler | 2013-10-04 | 1 | -1/+4 |
| * | Fix two issues regarding Got pointer (GP) setup. | Reed Kotler | 2013-09-18 | 1 | -0/+9 |
| * | [mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit | Akira Hatanaka | 2013-09-07 | 1 | -1/+1 |
| * | [mips] Rename HIRegs and LORegs. | Akira Hatanaka | 2013-08-14 | 1 | -8/+8 |
| * | Incorrect JAL instruction attributes caused the optimizer to make a wrong | Reed Kotler | 2013-08-10 | 1 | -3/+0 |
| * | Create a pattern for the "trap" instruction. | Reed Kotler | 2013-08-07 | 1 | -0/+15 |
| * | [mips] Rename register classes CPURegs and CPU64Regs. | Akira Hatanaka | 2013-08-06 | 1 | -2/+2 |
| * | Add the saving of S2. This is needed for some of the floating point | Reed Kotler | 2013-08-04 | 1 | -4/+4 |
| * | Clean up code for Mips16 large frame handling. | Reed Kotler | 2013-08-04 | 1 | -4/+10 |
| * | Add an omitted IsCall=1. | Reed Kotler | 2013-08-01 | 1 | -0/+1 |
| * | [mips] Fix definitions of multiply, multiply-add/sub and divide instructions. | Akira Hatanaka | 2013-03-30 | 1 | -2/+2 |
| * | [mips] Rename functions and variables to start with proper case. | Akira Hatanaka | 2013-03-14 | 1 | -1/+1 |
| * | Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters. | Reed Kotler | 2013-02-25 | 1 | -0/+2 |
| * | Make psuedo FEXT_T8I816_ins into a custom emitter. | Reed Kotler | 2013-02-24 | 1 | -0/+1 |
| * | Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded | Reed Kotler | 2013-02-24 | 1 | -0/+1 |
| * | Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses | Reed Kotler | 2013-02-23 | 1 | -5/+10 |
| * | Expand pseudos/macros for Selt. This is the last of the complex | Reed Kotler | 2013-02-23 | 1 | -0/+1 |
| * | Expand mips16 SelT form pseudso/macros. | Reed Kotler | 2013-02-22 | 1 | -0/+1 |
| * | Expand the sel pseudo/macro. This generates basic blocks where previously | Reed Kotler | 2013-02-21 | 1 | -0/+20 |
| * | Expand pseudos/macros: | Reed Kotler | 2013-02-20 | 1 | -10/+40 |
| * | Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16, | Reed Kotler | 2013-02-19 | 1 | -0/+32 |
| * | Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16. | Reed Kotler | 2013-02-19 | 1 | -0/+27 |
| * | Expand pseudo/macro BteqzT8SltuX16 . There is no test case because | Reed Kotler | 2013-02-18 | 1 | -0/+2 |
| * | Beginning of expanding all current mips16 macro/pseudo instruction sequences. | Reed Kotler | 2013-02-18 | 1 | -2/+16 |
| * | Clean up mips16 td file in preparation for massive pseudo lowering work. | Reed Kotler | 2013-02-16 | 1 | -71/+68 |
| * | Remove the form field from Mips16 instruction formats and set things | Reed Kotler | 2013-02-14 | 1 | -13/+22 |
| * | For Mips 16, add the optimization where the 16 bit form of addiu sp can be used | Reed Kotler | 2013-02-13 | 1 | -0/+22 |
| * | Make jumptables work for -static | Reed Kotler | 2013-02-13 | 1 | -0/+2 |
