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path: root/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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* [mips] Splitting up class definition from implementation.Matheus Almeida2014-03-201-129/+42
| | | | | | | | Also removed some unnecessary #includes. No functional changes. llvm-svn: 204320
* [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressionsPetar Jovanovic2014-02-041-0/+21
| | | | | | | | | | | Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS by creating target expression class MipsMCExpr. Patch by Sasa Stankovic. Differential Revision: http://llvm-reviews.chandlerc.com/D2592 llvm-svn: 200783
* Delete MCSubtargetInfo data members from target MCCodeEmitter classesDavid Woodhouse2014-01-281-28/+28
| | | | | | | | The subtarget info is explicitly passed to the EncodeInstruction method and we should use that subtarget info to influence any encoding decisions. llvm-svn: 200350
* Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()David Woodhouse2014-01-281-40/+65
| | | | llvm-svn: 200349
* Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()David Woodhouse2014-01-281-2/+4
| | | | llvm-svn: 200348
* Fix misaligned indentation in "if" block in MipsMCCodeEmitter.cppMark Seaborn2013-12-311-92/+92
| | | | llvm-svn: 198262
* Fix indentation alignment of a declaration in MipsMCCodeEmitter.cppMark Seaborn2013-12-291-2/+2
| | | | llvm-svn: 198162
* Support for microMIPS TLS relocations.Zoran Jovanovic2013-12-191-2/+4
| | | | llvm-svn: 197685
* [mips][msa] Fix issue with immediate fields of LD/ST instructionsMatheus Almeida2013-12-051-0/+46
| | | | | | | | | not being correctly encoded/decoded. In more detail, immediate fields of LD/ST instructions should be divided/multiplied by the size of the data format before encoding and after decoding, respectively. llvm-svn: 196494
* [mips][msa] Fix immediate value of LSA instruction as it was being wrongly ↵Matheus Almeida2013-11-181-0/+12
| | | | | | | | | encoded. The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field. llvm-svn: 195004
* Support for microMIPS branch instructions.Zoran Jovanovic2013-11-041-0/+28
| | | | llvm-svn: 193992
* Support for microMIPS jump instructionsZoran Jovanovic2013-10-291-0/+23
| | | | llvm-svn: 193623
* Support for microMIPS relocations 1.Zoran Jovanovic2013-10-231-12/+24
| | | | llvm-svn: 193247
* [mips] Add definition of instruction "drotr32" (double rotate right plus 32).Akira Hatanaka2013-09-071-0/+4
| | | | llvm-svn: 190232
* Changed commentJack Carter2013-08-271-1/+1
| | | | llvm-svn: 189396
* [Mips] Support for unaligned load/store microMips instructionsJack Carter2013-08-131-0/+16
| | | | | | | | This includes instructions lwl, lwr, swl and swr. Patch by Zoran Jovnovic llvm-svn: 188312
* Mips ELF: MicroMips direct object Little endian support. Jack Carter2013-08-081-4/+15
| | | | | | | | Test included. Patch by Zoran Jovanovich llvm-svn: 188024
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-181-1/+1
| | | | | | | | | Someone may want to do something crazy, like replace these objects if they change or something. No functionality change intended. llvm-svn: 184175
* Make helper functions static.Rafael Espindola2013-05-271-3/+65
| | | | | | And remove header and cpp file that are empty after that. llvm-svn: 182746
* [mips] First patch which adds support for micromips.Akira Hatanaka2013-04-191-1/+14
| | | | | | | | | This patch adds support for recoded (meaning assembly-language compatible to standard mips32) arithmetic 32-bit instructions. Patch by Zoran Jovanovic. llvm-svn: 179873
* Mips assembler: Enable handling of nested expressionsJack Carter2013-04-171-25/+37
| | | | | | | | | | This patch allows the Mips assembler to parse and emit nested expressions as instruction operands. It also extends the expansion of memory instructions when an offset is given as an expression. Contributer: Vladimir Medic llvm-svn: 179657
* Fix the invalid opcode for Mips branch instructions in the assemblerJack Carter2013-03-221-4/+6
| | | | | | | | | | | | | | | For mips a branch an 18-bit signed offset (the 16-bit offset field shifted left 2 bits) is added to the address of the instruction following the branch (not the branch itself), in the branch delay slot, to form a PC-relative effective target address. Previously, the code generator did not perform the shift of the immediate branch offset which resulted in wrong instruction opcode. This patch fixes the issue. Contributor: Vladimir Medic llvm-svn: 177687
* Fix the (clang -Werror) build by removing an unused member variable.David Blaikie2013-02-201-2/+1
| | | | llvm-svn: 175607
* ELF symbol table field st_other support, Jack Carter2013-02-191-4/+6
| | | | | | | | | | | excluding visibility bits. Mips (MicroMips) specific STO handling . The st_other field settig for STO_MIPS_MICROMIPS Contributer: Zoran Jovanovic llvm-svn: 175564
* Remove a final dependency on the form field in tablegen; which is a remnantReed Kotler2013-02-151-6/+0
| | | | | | | of the old jit and which we don't intend to support in mips16 or micromips. This dependency is for the testing of whether an instruction is a pseudo. llvm-svn: 175297
* [mips] Set HWEncoding field of registers. Use delete functionAkira Hatanaka2012-12-101-5/+7
| | | | | | getMipsRegisterNumbering and use MCRegisterInfo::getEncodingValue instead. llvm-svn: 169760
* Mips direct object xgot supportJack Carter2012-11-211-0/+12
| | | | | | | | | | | | | | This patch provides support for the MIPS relocations: *) R_MIPS_GOT_HI16 *) R_MIPS_GOT_LO16 *) R_MIPS_CALL_HI16 *) R_MIPS_CALL_LO16 These are used for large GOT instruction sequences. Contributer: Jack Carter llvm-svn: 168471
* This patch moves from using a hard coded number (4) Jack Carter2012-10-031-2/+4
| | | | | | | | | | | | | for the number of bytes in a particular instruction to using const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode()); Desc.getSize() This is necessary with the advent of 16 bit instructions with mips16 and micromips. It is also puts Mips in compliance with the other targets for getting instruction size. llvm-svn: 165171
* The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed ↵Jack Carter2012-10-021-4/+24
| | | | | | | | | | | | by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands. If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler. This code was originally called from MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically. The test cases have been checked in for a number of weeks now. llvm-svn: 165067
* Remove unused private fields to silence -Wunused-private-field.Craig Topper2012-09-151-9/+6
| | | | llvm-svn: 163973
* Mips specific llvm assembler support for branch and jump instructions.Jack Carter2012-09-061-2/+9
| | | | | | | Test case included. Contributer: Vladimir Medic llvm-svn: 163277
* Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.Jack Carter2012-08-061-0/+6
| | | | | | | | | | | | | | These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object. R_MIPS_HIGHER %higher(A+S) The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ]. R_MIPS_HIGHEST %highest(A+S) The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ]. llvm-svn: 161348
* The Mips specific relocation R_MIPS_GOT_DISP Jack Carter2012-07-131-3/+3
| | | | | | | | | | is used in cases where global symbols are directly represented in the GOT and we use an offset into the global offset table. This patch adds direct object support for R_MIPS_GOT_DISP. llvm-svn: 160183
* This allows hello world to be compiled for Mips 64 direct object.Jack Carter2012-06-271-2/+17
| | | | | | | | | | | It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocations as well. This passes make check. Jack llvm-svn: 159301
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-2/+2
| | | | llvm-svn: 158471
* Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach2012-05-151-0/+2
| | | | | | | | Add the MCRegisterInfo to the factories and constructors. Patch by Tom Stellard <Tom.Stellard@amd.com>. llvm-svn: 156828
* Remove some potential warnings about variables used uninitialized.Bill Wendling2012-04-221-1/+1
| | | | llvm-svn: 155307
* Retrieve and add the offset of a symbol in applyFixup rather than retrieve andAkira Hatanaka2012-03-271-65/+63
| | | | | | | set it in MipsMCCodeEmitter::getMachineOpValue. Assert in getMachineOpValue if MachineOperand MO is of an unexpected type. llvm-svn: 153494
* Incremental big endian patch by Jack Carter.Akira Hatanaka2012-03-211-3/+3
| | | | | | | | These changes allow us to compile big endian from the command line for 32 bit Mips targets. This patch will result in code and data actually being produced in the correct endianess. llvm-svn: 153153
* Pass endian information to constructors. Define separate functions to createAkira Hatanaka2012-03-011-5/+14
| | | | | | | | objects for big endian and little endian targets. Patch by Jack Carter. llvm-svn: 151788
* remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.Jia Liu2012-02-171-1/+1
| | | | llvm-svn: 150805
* add Emacs tag and fix some comment error in file headersJia Liu2012-02-171-1/+1
| | | | llvm-svn: 150775
* Widen the instruction encoder that TblGen emits to a 64 bits, which should ↵Owen Anderson2012-01-241-1/+1
| | | | | | accomodate every target I can think of offhand. llvm-svn: 148833
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-2/+0
| | | | llvm-svn: 148578
* Local dynamic TLS model for direct object output. Create the correct TLS MIPSAkira Hatanaka2011-12-221-0/+10
| | | | | | | | ELF relocations. Patch by Jack Carter. llvm-svn: 147118
* Variable cleanup. Based on past patch submittals variable names haveBruno Cardoso Lopes2011-12-071-5/+5
| | | | | | | been normalized and more descriptive comments added. Patch by Reed Kotler and Jack Carter. llvm-svn: 146088
* Add a few moreLocal/Global R_MIPS_GOT related fixups andBruno Cardoso Lopes2011-12-071-1/+4
| | | | | | | | make the addend fixup code a bit more generic Patch by Jack Carter. llvm-svn: 145998
* This patch makes the following changes necessary for MIPS' direct code emission.Akira Hatanaka2011-11-231-10/+27
| | | | | | | | - lower unaligned loads/stores. - encode the size operand of instructions INS and EXT. - emit relocation information needed for JAL (jump-and-link). llvm-svn: 145113
* Mips MC object code emission improvements:Bruno Cardoso Lopes2011-11-111-8/+205
| | | | | | | | | | "With this patch we can now generate runnable Mips code through LLVM direct object emission. We have run numerous simple programs, both C and C++ and with -O0 and -O3 from the output. The code is not production ready, but quite useful for experimentation." Patch and message by Jack Carter llvm-svn: 144414
* Initial implementation of MipsMCCodeEmitter.Akira Hatanaka2011-09-301-0/+52
Patch by Reed Kotler at Mips Technologies. llvm-svn: 140878
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