summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
Commit message (Collapse)AuthorAgeFilesLines
* [ARM] Support .reloc *, R_ARM_NONE, *Fangrui Song2019-05-171-4/+1
| | | | | | | | | | | | | | | | R_ARM_NONE can be used to create references among sections. When --gc-sections is used, the referenced section will be retained if the origin section is retained. Add a generic MCFixupKind FK_NONE as this kind of no-op relocation is ubiquitous on ELF and COFF, and probably available on many other binary formats. See D62014. Reviewed By: peter.smith Differential Revision: https://reviews.llvm.org/D61992 llvm-svn: 360980
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [mips][mc] Add basic support for R_MIPS_JALR/R_MICROMIPS_JALRVladimir Stefanovic2018-11-211-0/+4
| | | | | | | | | R_MIPS_JALR/R_MICROMIPS_JALR can now be parsed in .s files and emitted to .o. They are still not generated with JALR. Differential revision: https://reviews.llvm.org/D54721 llvm-svn: 347398
* Remove trailing spaceFangrui Song2018-07-301-1/+1
| | | | | | sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h} llvm-svn: 338293
* [mips] Emit R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16 / HI16 ↵Simon Atanasyan2018-05-291-0/+4
| | | | | | | | | | | | | relocations Emit R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_LO16 and R_MICROMIPS_GPREL16/R_MICROMIPS_SUB/R_MICROMIPS_HI16 chains of relocations for %lo(%neg(%gp_rel())) and %hi(%neg(%gp_rel())) expressions in case of microMIPS. Differential Revision: http://reviews.llvm.org/D47220 llvm-svn: 333409
* [mips] Emit R_MICROMIPS_HIGHER / R_MICROMIPS_HIGHEST relocationsSimon Atanasyan2018-05-291-2/+4
| | | | | | | | | | | Emit R_MICROMIPS_HIGHER / R_MICROMIPS_HIGHEST relocations for %higher() and %highest() expressions in case of microMIPS. These relocations do exactly the same things as R_MIPS_HIGHER / R_MIPS_HIGHEST, but for consistency it's better to write microMIPS variants. Differential Revision: http://reviews.llvm.org/D47219 llvm-svn: 333407
* [mips] Emit R_MICROMIPS_TLS_GOTTPREL relocation for %gottprel in case of ↵Simon Atanasyan2017-04-301-0/+3
| | | | | | | | | | | microMIPS In case of microMIPS mode %gottprel operator should emit microMIPS relocation R_MICROMIPS_TLS_GOTTPREL, not R_MIPS_TLS_GOTTPREL. Differential Revision: http://reviews.llvm.org/D32617 llvm-svn: 301763
* Re-commit r277988: [mips][ias] Fix all the hacks related to MIPS-specific ↵Daniel Sanders2016-08-081-0/+4
| | | | | | | | | unary operators (%hi/%lo/%gp_rel/etc.). Hopefully with the MSVC builds fixed. I've added a missing '#include <tuple>' that gcc and clang don't seem to need. llvm-svn: 277995
* Revert r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary ↵Daniel Sanders2016-08-081-4/+0
| | | | | | | | operators (%hi/%lo/%gp_rel/etc.). It seems that MSVC doesn't like std::tie(). llvm-svn: 277990
* [mips][ias] Fix all the hacks related to MIPS-specific unary operators ↵Daniel Sanders2016-08-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (%hi/%lo/%gp_rel/etc.). Summary: They are now lexed as a single token on targets where MCAsmInfo::HasMipsExpressions is true and then parsed in a similar way to the '~' operator as part of MCExpr::parseExpression. As a result: * expressions and immediates no longer have different parsing rules. The difference is now solely down to whether evaluateAsAbsolute() succeeds. * %hi(%neg(%gp_rel(x))) are no longer parsed as a single operator and decomposed into the three MipsMCExpr nodes. They are parsed directly as three MipsMCExpr nodes. * parseMemOperand no longer needs to eat all the surrounding parenthesis to get at the outermost operator to make this work * %hi(%neg(%gp_rel(x))) and %lo(%neg(%gp_rel(x))) are no longer the only 3-in-1 relocs that parse for N64. They're still the only combinations that are permitted in relocatable expressions though. Fixing that should be a later patch. * We no longer need to list all the tokens that can occur as the first token of an expression or immediate. test/MC/Mips/expr1.s: This change also prevents the incorrect lowering of %lo(2*4)+foo to %lo(8+foo) which is not an equivalent expression (the difference is whether foo is truncated to 16-bit or not) and the test has been updated to account for the macro expansion the correct expression requires. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D23110 llvm-svn: 277988
* ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocationZoran Jovanovic2016-05-191-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D15526 llvm-svn: 270048
* [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.Daniel Sanders2016-05-031-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is much closer to the way MIPS relocation expressions work (%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the various bodges in MipsAsmParser::evaluateRelocExpr(). Removing those bodges ensures that the constant stored in MCValue is the full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used to correct the %hi/%lo matching needed to sort the relocation table correctly. As part of this: * Gave MCExpr::print() the ability to omit parenthesis when emitting a symbol reference inside a MipsMCExpr operator like %hi(X). Without this we print things like %lo(($L1)). * %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of the related special cases have been removed or moved to MipsMCExpr. We can remove the rest as we gain support for the less common relocations when they are not part of this specific combination. * Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_'). * fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical and merged into fixup_Mips_GOT. * MO_GOT16 and MO_GOT turned out to be identical and have been merged into MO_GOT. * VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they have been merged into MEK_GOT Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19716 llvm-svn: 268379
* [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocationZoran Jovanovic2016-04-221-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D15026 llvm-svn: 267130
* [mips][microMIPS] Add R_MICROMIPS_PC19_S2 relocationZoran Jovanovic2016-04-211-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D14915 llvm-svn: 266988
* [mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocationZoran Jovanovic2016-04-211-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D14822 llvm-svn: 266985
* Implement .reloc (constant offset only) with support for R_MIPS_NONE and ↵Daniel Sanders2015-11-121-1/+4
| | | | | | | | | | | | | | | | R_MIPS_32. Summary: Support for R_MIPS_NONE allows us to parse MIPS16's usage of .reloc. R_MIPS_32 was included to be able to better test the directive. Targets can add their relocations by overriding MCAsmBackend::getFixupKind(). Subscribers: grosbach, rafael, majnemer, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13659 llvm-svn: 252888
* Recommit r232027 with PR22883 fixed: Add infrastructure for support of ↵Daniel Sanders2015-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | multiple memory constraints. The operand flag word for ISD::INLINEASM nodes now contains a 15-bit memory constraint ID when the operand kind is Kind_Mem. This constraint ID is a numeric equivalent to the constraint code string and is converted with a target specific hook in TargetLowering. This patch maps all memory constraints to InlineAsm::Constraint_m so there is no functional change at this point. It just proves that using these previously unused bits in the encoding of the flag word doesn't break anything. The next patch will make each target preserve the current mapping of everything to Constraint_m for itself while changing the target independent implementation of the hook to return Constraint_Unknown appropriately. Each target will then be adapted in separate patches to use appropriate Constraint_* values. PR22883 was caused the matching operands copying the whole of the operand flags for the matched operand. This included the constraint id which needed to be replaced with the operand number. This has been fixed with a conversion function. Following on from this, matching operands also used the operand number as the constraint id. This has been fixed by looking up the matched operand and taking it from there. llvm-svn: 232165
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-211-0/+3
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226657
* Reverted revision 226577.Jozef Kolek2015-01-201-3/+0
| | | | llvm-svn: 226595
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-201-0/+3
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226577
* [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructionsJozef Kolek2015-01-121-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D5271 llvm-svn: 225627
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-3/+3
| | | | | | | | | | Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
* [mips][mips64r6] Relocation R_MIPS_PC18_S3Zoran Jovanovic2014-06-131-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D3890 llvm-svn: 210908
* [mips][mips64r6] Add R_MIPS_PC19_S2Zoran Jovanovic2014-06-121-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D3866 llvm-svn: 210773
* [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16 Zoran Jovanovic2014-05-271-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D3860 llvm-svn: 209659
* [mips][mips64r6] Add relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2 Zoran Jovanovic2014-05-271-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D3824 llvm-svn: 209655
* Support for microMIPS TLS relocations.Zoran Jovanovic2013-12-191-0/+6
| | | | llvm-svn: 197685
* Support for microMIPS branch instructions.Zoran Jovanovic2013-11-041-0/+3
| | | | llvm-svn: 193992
* Support for microMIPS jump instructionsZoran Jovanovic2013-10-291-0/+3
| | | | llvm-svn: 193623
* Support for microMIPS relocations 1.Zoran Jovanovic2013-10-231-0/+33
| | | | llvm-svn: 193247
* Mips direct object xgot supportJack Carter2012-11-211-0/+12
| | | | | | | | | | | | | | This patch provides support for the MIPS relocations: *) R_MIPS_GOT_HI16 *) R_MIPS_GOT_LO16 *) R_MIPS_CALL_HI16 *) R_MIPS_CALL_LO16 These are used for large GOT instruction sequences. Contributer: Jack Carter llvm-svn: 168471
* Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.Jack Carter2012-08-061-0/+6
| | | | | | | | | | | | | | These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object. R_MIPS_HIGHER %higher(A+S) The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ]. R_MIPS_HIGHEST %highest(A+S) The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ]. llvm-svn: 161348
* The Mips specific relocation R_MIPS_GOT_DISP Jack Carter2012-07-131-0/+3
| | | | | | | | | | is used in cases where global symbols are directly represented in the GOT and we use an offset into the global offset table. This patch adds direct object support for R_MIPS_GOT_DISP. llvm-svn: 160183
* This allows hello world to be compiled for Mips 64 direct object.Jack Carter2012-06-271-0/+12
| | | | | | | | | | | It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocations as well. This passes make check. Jack llvm-svn: 159301
* comment fixJia Liu2012-02-241-1/+1
| | | | llvm-svn: 151341
* some comment fixJia Liu2012-02-241-3/+3
| | | | llvm-svn: 151340
* Local dynamic TLS model for direct object output. Create the correct TLS MIPSAkira Hatanaka2011-12-221-0/+9
| | | | | | | | ELF relocations. Patch by Jack Carter. llvm-svn: 147118
* Variable cleanup. Based on past patch submittals variable names haveBruno Cardoso Lopes2011-12-071-50/+55
| | | | | | | been normalized and more descriptive comments added. Patch by Reed Kotler and Jack Carter. llvm-svn: 146088
* Add a few moreLocal/Global R_MIPS_GOT related fixups andBruno Cardoso Lopes2011-12-071-2/+5
| | | | | | | | make the addend fixup code a bit more generic Patch by Jack Carter. llvm-svn: 145998
* Coding style cleanups. No functionality change.Bill Wendling2011-10-181-6/+5
| | | | llvm-svn: 142341
* Fixup enumerations.Akira Hatanaka2011-10-141-0/+90
Patch by Jack Carter at Mips. llvm-svn: 141934
OpenPOWER on IntegriCloud