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* Remove redundant argument.Rafael Espindola2017-06-241-1/+2
| | | | llvm-svn: 306189
* ARM: move some logic from processFixupValue to applyFixup.Rafael Espindola2017-06-231-1/+2
| | | | | | | | | | | | processFixupValue is called on every relaxation iteration. applyFixup is only called once at the very end. applyFixup is then the correct place to do last minute changes and value checks. While here, do proper range checks again for fixup_arm_thumb_bl. We used to do it, but dropped because of thumb2. We now do it again, but use the thumb2 range. llvm-svn: 306177
* Use a MutableArrayRef. NFC.Rafael Espindola2017-06-211-3/+3
| | | | llvm-svn: 305968
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* [mips] Emit R_MICROMIPS_TLS_GOTTPREL relocation for %gottprel in case of ↵Simon Atanasyan2017-04-301-0/+2
| | | | | | | | | | | microMIPS In case of microMIPS mode %gottprel operator should emit microMIPS relocation R_MICROMIPS_TLS_GOTTPREL, not R_MIPS_TLS_GOTTPREL. Differential Revision: http://reviews.llvm.org/D32617 llvm-svn: 301763
* Add MCContext argument to MCAsmBackend::applyFixup for error reportingAlex Bradbury2017-04-051-46/+28
| | | | | | | | | | | | | | | | A number of backends (AArch64, MIPS, ARM) have been using MCContext::reportError to report issues such as out-of-range fixup values in their TgtAsmBackend. This is great, but because MCContext couldn't easily be threaded through to the adjustFixupValue helper function from its usual callsite (applyFixup), these backends ended up adding an MCContext* argument and adding another call to applyFixup to processFixupValue. Adding an MCContext parameter to applyFixup makes this unnecessary, and even better - applyFixup can take a reference to MCContext rather than a potentially null pointer. Differential Revision: https://reviews.llvm.org/D30264 llvm-svn: 299529
* [mips][ias] Support .dtprel[d]word and .tprel[d]word directivesSimon Atanasyan2016-08-221-0/+4
| | | | | | | | | | | | | Assembler directives .dtprelword, .dtpreldword, .tprelword, and .tpreldword generates relocations R_MIPS_TLS_DTPREL32, R_MIPS_TLS_DTPREL64, R_MIPS_TLS_TPREL32, and R_MIPS_TLS_TPREL64 respectively. The main motivation for this patch is to be able to write test cases for checking correctness of the LLD linker's behaviour. Differential Revision: https://reviews.llvm.org/D23669 llvm-svn: 279439
* Re-commit r277988: [mips][ias] Fix all the hacks related to MIPS-specific ↵Daniel Sanders2016-08-081-2/+8
| | | | | | | | | unary operators (%hi/%lo/%gp_rel/etc.). Hopefully with the MSVC builds fixed. I've added a missing '#include <tuple>' that gcc and clang don't seem to need. llvm-svn: 277995
* Revert r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary ↵Daniel Sanders2016-08-081-8/+2
| | | | | | | | operators (%hi/%lo/%gp_rel/etc.). It seems that MSVC doesn't like std::tie(). llvm-svn: 277990
* [mips][ias] Fix all the hacks related to MIPS-specific unary operators ↵Daniel Sanders2016-08-081-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (%hi/%lo/%gp_rel/etc.). Summary: They are now lexed as a single token on targets where MCAsmInfo::HasMipsExpressions is true and then parsed in a similar way to the '~' operator as part of MCExpr::parseExpression. As a result: * expressions and immediates no longer have different parsing rules. The difference is now solely down to whether evaluateAsAbsolute() succeeds. * %hi(%neg(%gp_rel(x))) are no longer parsed as a single operator and decomposed into the three MipsMCExpr nodes. They are parsed directly as three MipsMCExpr nodes. * parseMemOperand no longer needs to eat all the surrounding parenthesis to get at the outermost operator to make this work * %hi(%neg(%gp_rel(x))) and %lo(%neg(%gp_rel(x))) are no longer the only 3-in-1 relocs that parse for N64. They're still the only combinations that are permitted in relocatable expressions though. Fixing that should be a later patch. * We no longer need to list all the tokens that can occur as the first token of an expression or immediate. test/MC/Mips/expr1.s: This change also prevents the incorrect lowering of %lo(2*4)+foo to %lo(8+foo) which is not an equivalent expression (the difference is whether foo is truncated to 16-bit or not) and the test has been updated to account for the macro expansion the correct expression requires. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D23110 llvm-svn: 277988
* MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFCJoel Jones2016-07-251-4/+8
| | | | | | | | | | | | | | | Some targets, notably AArch64 for ILP32, have different relocation encodings based upon the ABI. This is an enabling change, so a future patch can use the ABIName from MCTargetOptions to chose which relocations to use. Tested using check-llvm. The corresponding change to clang is in: http://reviews.llvm.org/D16538 Patch by: Joel Jones Differential Revision: https://reviews.llvm.org/D16213 llvm-svn: 276654
* ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocationZoran Jovanovic2016-05-191-1/+11
| | | | | | Differential Revision: http://reviews.llvm.org/D15526 llvm-svn: 270048
* [mips][ias] Fix R_MICROMIPS_GOT16 evaluation and eliminate symbol for ↵Daniel Sanders2016-05-161-0/+1
| | | | | | | | | | | | | | | | | | | R_MICROMIPS_(GOT|HI|LO)16 Summary: The failure r269410 worked around turned out to be caused by an incorrect evaluation of R_MICROMIPS_GOT16 which then caused the GOT entries to be incorrect. This patch fixes the evaluation and reverts r269410. Reviewers: sdardis, vkalintiris, rafael Subscribers: rafael, dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D20242 llvm-svn: 269641
* [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.Daniel Sanders2016-05-031-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is much closer to the way MIPS relocation expressions work (%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the various bodges in MipsAsmParser::evaluateRelocExpr(). Removing those bodges ensures that the constant stored in MCValue is the full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used to correct the %hi/%lo matching needed to sort the relocation table correctly. As part of this: * Gave MCExpr::print() the ability to omit parenthesis when emitting a symbol reference inside a MipsMCExpr operator like %hi(X). Without this we print things like %lo(($L1)). * %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of the related special cases have been removed or moved to MipsMCExpr. We can remove the rest as we gain support for the less common relocations when they are not part of this specific combination. * Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_'). * fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical and merged into fixup_Mips_GOT. * MO_GOT16 and MO_GOT turned out to be identical and have been merged into MO_GOT. * VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they have been merged into MEK_GOT Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19716 llvm-svn: 268379
* [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocationZoran Jovanovic2016-04-221-0/+15
| | | | | | Differential Revision: http://reviews.llvm.org/D15026 llvm-svn: 267130
* [mips][microMIPS] Add R_MICROMIPS_PC19_S2 relocationZoran Jovanovic2016-04-211-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D14915 llvm-svn: 266988
* [mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocationZoran Jovanovic2016-04-211-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D14822 llvm-svn: 266985
* [MC, COFF] Add .reloc support for WinCOFFDavid Majnemer2016-01-191-10/+5
| | | | | | | This adds rudimentary support for a few relocations that we will use for the CodeView debug format. llvm-svn: 258216
* [Assembler] Make fatal assembler errors non-fatalOliver Stannard2015-11-171-16/+32
| | | | | | | | | | | | | | Currently, if the assembler encounters an error after parsing (such as an out-of-range fixup), it reports this as a fatal error, and so stops after the first error. However, for most of these there is an obvious way to recover after emitting the error, such as emitting the fixup with a value of zero. This means that we can report on all of the errors in a file, not just the first one. MCContext::reportError records the fact that an error was encountered, so we won't actually emit an object file with the incorrect contents. Differential Revision: http://reviews.llvm.org/D14717 llvm-svn: 253328
* Implement .reloc (constant offset only) with support for R_MIPS_NONE and ↵Daniel Sanders2015-11-121-0/+14
| | | | | | | | | | | | | | | | R_MIPS_32. Summary: Support for R_MIPS_NONE allows us to parse MIPS16's usage of .reloc. R_MIPS_32 was included to be able to better test the directive. Targets can add their relocations by overriding MCAsmBackend::getFixupKind(). Subscribers: grosbach, rafael, majnemer, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13659 llvm-svn: 252888
* Change isUIntN/isIntN calls with constant N to use the template version. NFCCraig Topper2015-10-101-8/+8
| | | | llvm-svn: 249952
* Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and ↵Daniel Sanders2015-09-151-8/+4
| | | | | | | | related. NFC. Eric has replied and has demanded the patch be reverted. llvm-svn: 247702
* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* ↵Daniel Sanders2015-09-151-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | and related. NFC. Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Thanks go to Pavel Labath for fixing LLDB for me. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247692
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-151-8/+4
| | | | | | LLDB needs to be updated in the same commit. llvm-svn: 247686
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-151-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247683
* [mips64] Emit correct addend for some PC-relative relocationsPetar Jovanovic2015-06-231-6/+0
| | | | | | | | | | | So far, LLVM has not emitted correct addend for N64 and N32 ABI. This patch fixes that. It also removes fixup from MCJIT for R_MIPS_PC16 relocation. Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D10565 llvm-svn: 240404
* Replace string GNU Triples with llvm::Triple in MCAsmBackend subclasses and ↵Daniel Sanders2015-06-101-16/+11
| | | | | | | | | | | | | | | | | | create*AsmBackend(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: echristo, rafael Reviewed By: rafael Subscribers: rafael, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10243 llvm-svn: 239464
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-181-8/+8
| | | | | | | The naming was a mish-mash of old and new style. Update to be consistent with the new. NFC. llvm-svn: 237594
* [mc] Clean up emission of byte sequencesBenjamin Kramer2015-04-171-6/+1
| | | | | | No functional change intended. llvm-svn: 235178
* Use raw_pwrite_stream in the object writer/streamer.Rafael Espindola2015-04-141-1/+2
| | | | | | The ELF object writer will take advantage of that in the next commit. llvm-svn: 234950
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-211-1/+13
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226657
* Reverted revision 226577.Jozef Kolek2015-01-201-13/+1
| | | | llvm-svn: 226595
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-201-1/+13
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226577
* [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructionsJozef Kolek2015-01-121-0/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D5271 llvm-svn: 225627
* Support padding unaligned data in .text.Joerg Sonnenberger2014-10-021-1/+6
| | | | llvm-svn: 218870
* [mips][mips64r6] Relocation R_MIPS_PC18_S3Zoran Jovanovic2014-06-131-0/+9
| | | | | | Differential Revision: http://reviews.llvm.org/D3890 llvm-svn: 210908
* [mips][mips64r6] Add R_MIPS_PC19_S2Zoran Jovanovic2014-06-121-0/+9
| | | | | | Differential Revision: http://reviews.llvm.org/D3866 llvm-svn: 210773
* [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16 Zoran Jovanovic2014-05-271-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D3860 llvm-svn: 209659
* [mips][mips64r6] Add relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2 Zoran Jovanovic2014-05-271-0/+20
| | | | | | Differential Revision: http://reviews.llvm.org/D3824 llvm-svn: 209655
* [mips] Work around inconsistency in llvm-mc's placement of fixup markersDaniel Sanders2014-05-231-2/+62
| | | | | | | | | | | | | | | | | | | Summary: Add a second fixup table to MipsAsmBackend::getFixupKindInfo() to correctly position llvm-mc's fixup placeholders for big-endian. See PR19836 for full details of the issue. To summarize, the fixup placeholders do not account for endianness properly and the implementations of getFixupKindInfo() for each target are measuring MCFixupKindInfo.TargetOffset from different ends of the instruction encoding to compensate. Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3889 llvm-svn: 209514
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-1/+1
| | | | llvm-svn: 207197
* MicroMIPS specific little endian fixup data byte ordering.Zoran Jovanovic2014-04-031-2/+24
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D3245 llvm-svn: 205528
* Completely rewrite ELFObjectWriter::RecordRelocation.Rafael Espindola2014-03-291-1/+2
| | | | | | | | | | | | | | | | | | | I started trying to fix a small issue, but this code has seen a small fix too many. The old code was fairly convoluted. Some of the issues it had: * It failed to check if a symbol difference was in the some section when converting a relocation to pcrel. * It failed to check if the relocation was already pcrel. * The pcrel value computation was wrong in some cases (relocation-pc.s) * It was missing quiet a few cases where it should not convert symbol relocations to section relocations, leaving the backends to patch it up. * It would not propagate the fact that it had changed a relocation to pcrel, requiring a quiet nasty work around in ARM. * It was missing comments. llvm-svn: 205076
* Add const.Rafael Espindola2014-03-281-1/+1
| | | | llvm-svn: 205013
* Split the file MipsAsmBackend.cpp in Split the file MipsAsmBackend.cpp and ↵Zoran Jovanovic2014-03-271-195/+149
| | | | | | | | Split the file MipsAsmBackend.h. Differential Revision: http://llvm-reviews.chandlerc.com/D3134 llvm-svn: 204921
* [mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug dataEd Maste2014-03-031-0/+4
| | | | | | | | | This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc. Differential Revision: http://llvm-reviews.chandlerc.com/D2517 llvm-svn: 202716
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Support for microMIPS TLS relocations.Zoran Jovanovic2013-12-191-0/+2
| | | | llvm-svn: 197685
* [mips] Fix off by one issue when applying a fixup.Matheus Almeida2013-12-171-2/+2
| | | | | | | The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed immediate. llvm-svn: 197506
* [mips] Add checks for alignment and maximum displacements for most of theMatheus Almeida2013-12-131-5/+31
| | | | | | | | | | | branch instructions for mips and micromips instruction sets thus avoiding the situation of generating branches to undesired locations if offsets cannot be encoded. This patch also checks if a fixup cannot be applied and returns a fatal error if that's the case. llvm-svn: 197223
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