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* [Mips] Move InstPrinter files to MCTargetDesc. NFCRichard Trieu2019-05-111-287/+0
| | | | | | | | | For some targets, there is a circular dependency between InstPrinter and MCTargetDesc. Merging them together will fix this. For the other targets, the merging is to maintain consistency so all targets will have the same structure. llvm-svn: 360497
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [mips] Remove dead code. NFCSimon Atanasyan2018-07-111-5/+0
| | | | llvm-svn: 336777
* [llvm] Remove redundant return [NFC]Mandeep Singh Grang2017-11-121-1/+0
| | | | | | | | | | | | Reviewers: davidxl, olista01, Eugene.Zelenko Reviewed By: Eugene.Zelenko Subscribers: sdardis, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D39917 llvm-svn: 317995
* Revert "[mips] Fix c.<cc>.<fmt> instruction definition."Simon Dardis2016-09-091-0/+6
| | | | | | | This reverts commit r281022. Mips buildbot broke, due to unhandled register class FCC. llvm-svn: 281033
* [mips] Fix c.<cc>.<fmt> instruction definition.Simon Dardis2016-09-091-6/+0
| | | | | | | | | | | | | | | As part of this effort, remove MipsFCmp nodes and use tablegen patterns rather than custom lowering through C++. Unexpectedly, this improves codesize for microMIPS as previous floating point setcc expansions would materialize 0 and 1 into GPRs before using the relevant mov[tf].[sd] instruction. Now $zero is used directly. Reviewers: dsanders, vkalintiris, zoran.jovanovic Differential Review: https://reviews.llvm.org/D23118 llvm-svn: 281022
* [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructionsHrvoje Varga2016-07-221-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D19906 llvm-svn: 276397
* [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and ↵Zlatko Buljan2016-06-151-0/+1
| | | | | | | | NOR instructions Differential Revision: http://reviews.llvm.org/D16719 llvm-svn: 272764
* [mips] Implement 'la' macro in PIC mode for O32.Daniel Sanders2016-06-031-28/+1
| | | | | | | | | | | | | | | | Summary: N32 support will follow in a later patch since the symbol version of 'la' incorrectly believes N32 to have 64-bit pointers and rejects it early. This fixes the three incorrectly expanded 'la' macros found in bionic. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: http://reviews.llvm.org/D20820 llvm-svn: 271644
* [mips] Fix unused variable warning for release builds introduced by r268379.Daniel Sanders2016-05-031-3/+1
| | | | llvm-svn: 268383
* [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.Daniel Sanders2016-05-031-36/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is much closer to the way MIPS relocation expressions work (%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the various bodges in MipsAsmParser::evaluateRelocExpr(). Removing those bodges ensures that the constant stored in MCValue is the full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used to correct the %hi/%lo matching needed to sort the relocation table correctly. As part of this: * Gave MCExpr::print() the ability to omit parenthesis when emitting a symbol reference inside a MipsMCExpr operator like %hi(X). Without this we print things like %lo(($L1)). * %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of the related special cases have been removed or moved to MipsMCExpr. We can remove the rest as we gain support for the less common relocations when they are not part of this specific combination. * Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_'). * fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical and merged into fixup_Mips_GOT. * MO_GOT16 and MO_GOT turned out to be identical and have been merged into MO_GOT. * VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they have been merged into MEK_GOT Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19716 llvm-svn: 268379
* [mips] Use `formatImm` call to print immediate value in the `MipsInstPrinter`Simon Atanasyan2016-03-171-2/+2
| | | | | | | | | That allows, for example, to print hex-formatted immediates using llvm-objdump --print-imm-hex command line option. Differential Revision: http://reviews.llvm.org/D18195 llvm-svn: 263704
* [mips] Range check uimm20 and fixed a bug this revealed.Daniel Sanders2016-02-291-15/+12
| | | | | | | | | | | | | | | | | | | Summary: The bug was that dextu's operand 3 would print 0-31 instead of 32-63 when printing assembly. This came up when replacing MipsInstPrinter::printUnsignedImm() with a version that could handle arbitrary bit widths. MipsAsmPrinter::printUnsignedImm*() don't seem to be used so they have been removed. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15521 llvm-svn: 262231
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-121-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D11406 llvm-svn: 252885
* MC: Add target hook to control symbol quotingMatt Arsenault2015-06-091-4/+5
| | | | llvm-svn: 239370
* [MCInstPrinter] Enable MCInstPrinter to change its behavior based on theAkira Hatanaka2015-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. llvm-svn: 233411
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-211-0/+1
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226657
* Reverted revision 226577.Jozef Kolek2015-01-201-1/+0
| | | | llvm-svn: 226595
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-201-0/+1
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226577
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition ↵Craig Topper2015-01-051-2/+2
| | | | | | into the assert. llvm-svn: 225160
* [mips][microMIPS] Implement SWP and LWP instructionsZoran Jovanovic2014-12-161-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D5667 llvm-svn: 224338
* [mips][microMIPS] Implement SWM16 and LWM16 instructionsZoran Jovanovic2014-11-271-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D5579 llvm-svn: 222901
* [mips][micromips] Implement SWM32 and LWM32 instructionsZoran Jovanovic2014-11-191-0/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D5519 llvm-svn: 222367
* [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16 Zoran Jovanovic2014-05-271-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D3860 llvm-svn: 209659
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Revert r205194 - [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16.Daniel Sanders2014-03-311-0/+1
| | | | | | There's a couple additional bits I missed. llvm-svn: 205195
* [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16.Daniel Sanders2014-03-311-1/+0
| | | | llvm-svn: 205194
* [cleanup] Re-sort all the includes with utils/sort_includes.py.Chandler Carruth2014-03-041-1/+1
| | | | llvm-svn: 202811
* [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressionsPetar Jovanovic2014-02-041-2/+5
| | | | | | | | | | | Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS by creating target expression class MipsMCExpr. Patch by Sasa Stankovic. Differential Revision: http://llvm-reviews.chandlerc.com/D2592 llvm-svn: 200783
* Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.Reed Kotler2013-12-111-0/+8
| | | | llvm-svn: 196999
* Cleaning up of prologue/epilogue code for Mips16. First stepReed Kotler2013-12-081-0/+24
| | | | | | here is to make save/restore into variable number of argument instructions. llvm-svn: 196726
* [mips][msa] Added support for matching splati from normal IR (i.e. not ↵Daniel Sanders2013-09-271-0/+9
| | | | | | | | intrinsics) Updated some of the vshf since they (correctly) emit splati's now llvm-svn: 191511
* [mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics)Daniel Sanders2013-09-241-0/+5
| | | | llvm-svn: 191302
* [mips] Place parentheses around && to silence warning.Akira Hatanaka2013-09-071-3/+3
| | | | llvm-svn: 190234
* [mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, ↵Akira Hatanaka2013-09-061-1/+4
| | | | | | | | which is equivalent to "beq $zero, $zero, offset". llvm-svn: 190220
* [micromips] Print instruction alias "not" if the last operand of a nor is zero.Akira Hatanaka2013-08-211-0/+1
| | | | llvm-svn: 188851
* [mips] Delete unnecessary InstAliases. Also, clear some of the InstAlias'Akira Hatanaka2013-08-061-0/+6
| | | | | | EmitAlias flag and have MipsInstPrinter::printAlias print the aliases. llvm-svn: 187824
* [mips] Replace usages of register classes with register operands. Also, removeAkira Hatanaka2013-08-061-0/+6
| | | | | | | unnecessary jalr InstAliases in Mips64InstrInfo.td and add the code to print jalr InstAliases in MipsInstPrinter::printAlias. llvm-svn: 187821
* [mips] Define "bal" as a pseudo instruction. Also, fix bug in the InstAlias thatAkira Hatanaka2013-07-301-0/+3
| | | | | | turns "bal" into "bgezal". llvm-svn: 187440
* [mips] Add comment and simplify function.Akira Hatanaka2013-07-291-23/+14
| | | | llvm-svn: 187371
* [mips] Fix FP branch instructions to have explicit FP condition code registerAkira Hatanaka2013-07-261-0/+8
| | | | | | operands. llvm-svn: 187238
* [mips] Delete register print method MipsInstPrinter::printCPURegs that is notAkira Hatanaka2013-07-261-5/+0
| | | | | | | | needed. The generic method printOperand will do. No functionality change. llvm-svn: 187231
* [mips] Print instructions "beq", "bne" and "or" using assembler pseudoAkira Hatanaka2013-07-261-1/+51
| | | | | | | | | | instructions "beqz", "bnez" and "move", when possible. beq $2, $zero, $L1 => beqz $2, $L1 bne $2, $zero, $L1 => bnez $2, $L1 or $2, $3, $zero => move $2, $3 llvm-svn: 187229
* This patch that sets the EmitAlias flag in td files Jack Carter2013-02-051-1/+4
| | | | | | | | | | | | | and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic llvm-svn: 174358
* This patch tackles the problem of parsing Mips Jack Carter2013-01-121-0/+5
| | | | | | | | | | | | | | | | | | register names in the standalone assembler llvm-mc. Registers such as $A1 can represent either a 32 or 64 bit register based on the instruction using it. In addition, based on the abi, $T0 can represent different 32 bit registers. The problem is resolved by the Mips specific AsmParser td definitions changing to work together. Many cases of RegisterClass parameters are now RegisterOperand. Contributer: Vladimir Medic llvm-svn: 172284
* [mips] Generate big GOT code.Akira Hatanaka2012-11-211-0/+4
| | | | llvm-svn: 168460
* Add HIGHER and HIGHEST relocations to Mips backend.Akira Hatanaka2012-07-211-0/+2
| | | | llvm-svn: 160599
* Enclose instruction rdhwr with directives, which are needed when target isAkira Hatanaka2012-07-051-0/+18
| | | | | | mips32 rev1 (the directives are emitted when target is mips32r2 too). llvm-svn: 159770
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-021-4/+0
| | | | | | | | MCInstPrinter. All implementations used the same code. llvm-svn: 153866
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-021-2/+2
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
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