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* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-211-0/+1
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226657
* Reverted revision 226577.Jozef Kolek2015-01-201-1/+0
| | | | llvm-svn: 226595
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-201-0/+1
| | | | | | | | | | | | | | Implement microMIPS 16-bit unconditional branch instruction B. Implemented 16-bit microMIPS unconditional instruction has real name B16, and B is an alias which expands to either B16 or BEQ according to the rules: b 256 --> b16 256 # R_MICROMIPS_PC10_S1 b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1 b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1 Differential Revision: http://reviews.llvm.org/D3514 llvm-svn: 226577
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition ↵Craig Topper2015-01-051-2/+2
| | | | | | into the assert. llvm-svn: 225160
* [mips][microMIPS] Implement SWP and LWP instructionsZoran Jovanovic2014-12-161-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D5667 llvm-svn: 224338
* [mips][microMIPS] Implement SWM16 and LWM16 instructionsZoran Jovanovic2014-11-271-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D5579 llvm-svn: 222901
* [mips][micromips] Implement SWM32 and LWM32 instructionsZoran Jovanovic2014-11-191-0/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D5519 llvm-svn: 222367
* [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16 Zoran Jovanovic2014-05-271-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D3860 llvm-svn: 209659
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Revert r205194 - [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16.Daniel Sanders2014-03-311-0/+1
| | | | | | There's a couple additional bits I missed. llvm-svn: 205195
* [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16.Daniel Sanders2014-03-311-1/+0
| | | | llvm-svn: 205194
* [cleanup] Re-sort all the includes with utils/sort_includes.py.Chandler Carruth2014-03-041-1/+1
| | | | llvm-svn: 202811
* [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressionsPetar Jovanovic2014-02-041-2/+5
| | | | | | | | | | | Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS by creating target expression class MipsMCExpr. Patch by Sasa Stankovic. Differential Revision: http://llvm-reviews.chandlerc.com/D2592 llvm-svn: 200783
* Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.Reed Kotler2013-12-111-0/+8
| | | | llvm-svn: 196999
* Cleaning up of prologue/epilogue code for Mips16. First stepReed Kotler2013-12-081-0/+24
| | | | | | here is to make save/restore into variable number of argument instructions. llvm-svn: 196726
* [mips][msa] Added support for matching splati from normal IR (i.e. not ↵Daniel Sanders2013-09-271-0/+9
| | | | | | | | intrinsics) Updated some of the vshf since they (correctly) emit splati's now llvm-svn: 191511
* [mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics)Daniel Sanders2013-09-241-0/+5
| | | | llvm-svn: 191302
* [mips] Place parentheses around && to silence warning.Akira Hatanaka2013-09-071-3/+3
| | | | llvm-svn: 190234
* [mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, ↵Akira Hatanaka2013-09-061-1/+4
| | | | | | | | which is equivalent to "beq $zero, $zero, offset". llvm-svn: 190220
* [micromips] Print instruction alias "not" if the last operand of a nor is zero.Akira Hatanaka2013-08-211-0/+1
| | | | llvm-svn: 188851
* [mips] Delete unnecessary InstAliases. Also, clear some of the InstAlias'Akira Hatanaka2013-08-061-0/+6
| | | | | | EmitAlias flag and have MipsInstPrinter::printAlias print the aliases. llvm-svn: 187824
* [mips] Replace usages of register classes with register operands. Also, removeAkira Hatanaka2013-08-061-0/+6
| | | | | | | unnecessary jalr InstAliases in Mips64InstrInfo.td and add the code to print jalr InstAliases in MipsInstPrinter::printAlias. llvm-svn: 187821
* [mips] Define "bal" as a pseudo instruction. Also, fix bug in the InstAlias thatAkira Hatanaka2013-07-301-0/+3
| | | | | | turns "bal" into "bgezal". llvm-svn: 187440
* [mips] Add comment and simplify function.Akira Hatanaka2013-07-291-23/+14
| | | | llvm-svn: 187371
* [mips] Fix FP branch instructions to have explicit FP condition code registerAkira Hatanaka2013-07-261-0/+8
| | | | | | operands. llvm-svn: 187238
* [mips] Delete register print method MipsInstPrinter::printCPURegs that is notAkira Hatanaka2013-07-261-5/+0
| | | | | | | | needed. The generic method printOperand will do. No functionality change. llvm-svn: 187231
* [mips] Print instructions "beq", "bne" and "or" using assembler pseudoAkira Hatanaka2013-07-261-1/+51
| | | | | | | | | | instructions "beqz", "bnez" and "move", when possible. beq $2, $zero, $L1 => beqz $2, $L1 bne $2, $zero, $L1 => bnez $2, $L1 or $2, $3, $zero => move $2, $3 llvm-svn: 187229
* This patch that sets the EmitAlias flag in td files Jack Carter2013-02-051-1/+4
| | | | | | | | | | | | | and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic llvm-svn: 174358
* This patch tackles the problem of parsing Mips Jack Carter2013-01-121-0/+5
| | | | | | | | | | | | | | | | | | register names in the standalone assembler llvm-mc. Registers such as $A1 can represent either a 32 or 64 bit register based on the instruction using it. In addition, based on the abi, $T0 can represent different 32 bit registers. The problem is resolved by the Mips specific AsmParser td definitions changing to work together. Many cases of RegisterClass parameters are now RegisterOperand. Contributer: Vladimir Medic llvm-svn: 172284
* [mips] Generate big GOT code.Akira Hatanaka2012-11-211-0/+4
| | | | llvm-svn: 168460
* Add HIGHER and HIGHEST relocations to Mips backend.Akira Hatanaka2012-07-211-0/+2
| | | | llvm-svn: 160599
* Enclose instruction rdhwr with directives, which are needed when target isAkira Hatanaka2012-07-051-0/+18
| | | | | | mips32 rev1 (the directives are emitted when target is mips32r2 too). llvm-svn: 159770
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-021-4/+0
| | | | | | | | MCInstPrinter. All implementations used the same code. llvm-svn: 153866
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-021-2/+2
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
* remove blanks, and some code formatJia Liu2012-02-281-2/+2
| | | | llvm-svn: 151625
* remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.Jia Liu2012-02-171-1/+1
| | | | llvm-svn: 150805
* add Emacs tag and fix some comment error in file headersJia Liu2012-02-171-1/+1
| | | | llvm-svn: 150775
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-1/+1
| | | | llvm-svn: 149961
* Tidy up. Simplify logic. No functional change intended.Akira Hatanaka2011-12-191-20/+20
| | | | llvm-svn: 146896
* Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct objectAkira Hatanaka2011-12-141-0/+3
| | | | | | | emission is not supported yet, but a patch that adds the support should follow soon. llvm-svn: 146572
* Add a few moreLocal/Global R_MIPS_GOT related fixups andBruno Cardoso Lopes2011-12-071-0/+1
| | | | | | | | make the addend fixup code a bit more generic Patch by Jack Carter. llvm-svn: 145998
* Fix printing of MCSymbolRegExpr. Needs three closing parentheses forAkira Hatanaka2011-11-111-1/+4
| | | | | | VK_Mips_GPOFF_HI/LO. llvm-svn: 144366
* Properly handle Mips MC relocations and lower cpload and cprestore macros to ↵Bruno Cardoso Lopes2011-11-081-1/+49
| | | | | | | | MCInsts. Patch by Jack Carter. llvm-svn: 144139
* Replace (Lower|Upper)caseString in favor of StringRef's newest methods.Benjamin Kramer2011-11-061-2/+1
| | | | llvm-svn: 143891
* These do not need to be conditional on the presence of CommentStream, as ↵Owen Anderson2011-09-211-1/+1
| | | | | | they have a fallback path now. llvm-svn: 140267
* In the disassembler C API, be careful not to confuse the comment streamer ↵Owen Anderson2011-09-211-1/+1
| | | | | | that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. llvm-svn: 140217
* Don't attach annotations to MCInst's. Instead, have the disassembler ↵Owen Anderson2011-09-151-1/+3
| | | | | | return, and the printer accept, an annotation string which can be passed through if the client cares about annotations. llvm-svn: 139876
* 80 columns.Akira Hatanaka2011-09-091-1/+1
| | | | llvm-svn: 139339
* Silence compiler warning.Benjamin Kramer2011-07-081-0/+2
| | | | llvm-svn: 134730
* Lower MachineInstr to MC Inst and print to .s files. Akira Hatanaka2011-07-071-0/+125
llvm-svn: 134661
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