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path: root/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
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* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
| | | | | | The Function can never be nullptr so we can return a reference. llvm-svn: 320884
* [MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.Vadzim Dambrouski2017-05-241-1/+1
| | | | | | | | | Use ADDframe pseudo instruction instead. This will fix machine verifier error, and will help to fix PR32146. Differential Revision: https://reviews.llvm.org/D33452 llvm-svn: 303758
* [MSP430] Generate EABI-compliant libcallsVadzim Dambrouski2017-05-111-2/+2
| | | | | | | | | | | | | Updates the MSP430 target to generate EABI-compatible libcall names. As a byproduct, adjusts the hardware multiplier options available in the MSP430 target, adds support for promotion of the ISD::MUL operation for 8-bit integers, and correctly marks R11 as used by call instructions. Patch by Andrew Wygle. Differential Revision: https://reviews.llvm.org/D32676 llvm-svn: 302820
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-2/+2
| | | | | | | getFrameInfo() never returns nullptr so we should use a reference instead of a pointer. llvm-svn: 277017
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-5/+4
| | | | | | | | | | | | | Summary: The target frame lowering's concrete type is always known in RegisterInfo, yet it's only sometimes devirtualized through a static_cast. This change adds an auto-generated static function <Target>GenRegisterInfo::getFrameLowering(const MachineFunction &MF) which does this devirtualization, and uses this function in all targets which can. This change was suggested by sunfish in D11070 for WebAssembly, I figure that I may as well improve the other targets while I'm here. Subscribers: sunfish, ted, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11093 llvm-svn: 241921
* Drop the W postfix on the 16-bit registers.Job Noorman2014-09-101-19/+19
| | | | | | | This ensures the inline assembly register constraints are properly recognised in TargetLowering::getRegForInlineAsmConstraint. llvm-svn: 217479
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-10/+5
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-5/+10
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Remove uses and caches of the target machine and subtarget fromEric Christopher2014-06-271-4/+2
| | | | | | | | both MSP430InstrInfo and MSP430RegisterInfo. Remove unused member variable StackAlign from MSP430RegisterInfo. Update constructors accordingly. llvm-svn: 211835
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-2/+2
| | | | | | | | | | | | system headers above the includes of generated '.inc' files that actually contain code. In a few targets this was already done pretty consistently, but it wasn't done *really* consistently anywhere. It is strictly cleaner IMO and necessary in a bunch of places where the DEBUG_TYPE is referenced from the generated code. Consistency with the necessary places trumps. Hopefully the build bots are OK with the movement of intrin.h... llvm-svn: 206838
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-5/+5
| | | | llvm-svn: 205610
* Mark FPB as a reserved register when needed.Job Noorman2014-04-021-1/+3
| | | | llvm-svn: 205421
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-2/+2
| | | | | | Remove the old functions. llvm-svn: 202636
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+3
| | | | | | the internals of TargetMachine could change. llvm-svn: 183492
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-60/+0
| | | | | | | | | | | | | | | to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. llvm-svn: 175788
* Remove unused variable, which should have been removed with r174083.Chad Rosier2013-01-311-1/+0
| | | | llvm-svn: 174094
* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-311-11/+7
| | | | | | | Each target implementation was needlessly recomputing the index. Part of rdar://13076458 llvm-svn: 174083
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Fix fallout from RegInfo => FrameLowering refactoring on MSP430.Anton Korobeynikov2012-10-171-14/+0
| | | | | | Patch by Job Noorman! llvm-svn: 166108
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-071-1/+2
| | | | | | | | | | | | | The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! llvm-svn: 156328
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-041-5/+5
| | | | | | size of static data. llvm-svn: 151996
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-15/+1
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-5/+4
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+3
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-3/+4
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-1/+5
| | | | | | | | | | | | | | | | | | | | The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+5
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-7/+7
| | | | | | and fixes here and there. llvm-svn: 123170
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-20/+16
| | | | llvm-svn: 119740
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-132/+0
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-6/+4
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* Constify some arguments.Eric Christopher2010-07-201-1/+1
| | | | llvm-svn: 108812
* Remove two other uses of ATTRIBUTE_UNUSED for variables only used withinChandler Carruth2010-07-111-2/+2
| | | | | | | | assert()s, switching to void-casts. Removed an unneeded Compiler.h include as a result. There are two other uses in LLVM, but they're not due to assert()s, so I've left them alone. llvm-svn: 108088
* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng2010-07-031-1/+1
| | | | | | slots so it's always false. llvm-svn: 107550
* cleanupRafael Espindola2010-06-021-42/+0
| | | | llvm-svn: 105322
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-2/+1
| | | | llvm-svn: 100214
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* Mark variable used by 'assert' as 'unused'.Bill Wendling2009-12-281-2/+2
| | | | llvm-svn: 92198
* Mark FPW as allocable when frame address is taken.Anton Korobeynikov2009-12-211-5/+43
| | | | llvm-svn: 91841
* Initial codegen support for MSP430 ISRsAnton Korobeynikov2009-12-071-3/+24
| | | | llvm-svn: 90739
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-3/+3
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-2/+2
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-4/+6
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
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