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Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html
llvm-svn: 187145
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size.
llvm-svn: 186274
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missed in the first pass because the script didn't yet handle include
guards.
Note that the script is now able to handle all of these headers without
manual edits. =]
llvm-svn: 169224
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MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
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is discouraged now.
llvm-svn: 147738
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http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
llvm-svn: 146960
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by overriding TargetFrameInfo::getFrameIndexOffset to take into account the new frame index information.
llvm-svn: 122889
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llvm-svn: 122778
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pc relative branch BRLD.
2. Make sure that the MBlaze stack is aligned to 4-byte boundaries.
3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations.
llvm-svn: 121639
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llvm-svn: 121355
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Major cleanup of whitespace and formatting issues in MBlaze backend
llvm-svn: 118434
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MachineFunctionInfo subclasses.
llvm-svn: 101634
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Adding the function "lookupGCCName" to the MBlazeIntrinsicInfo
class to support the Clang MicroBlaze target.
Additionally, minor fixes which remove some unused PIC code
(PIC is not supported yet in the MicroBlaze backend) and
removed some unused variables.
llvm-svn: 97054
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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze
The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.
llvm-svn: 96969
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