bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	[CodeGen] Rename MachineInstrBuilder::addOperand. NFC	Diana Picus	2017-01-13	1	-2/+2
*	Finish renaming remaining analyzeBranch functions	Matt Arsenault	2016-09-14	1	-3/+3
*	Make analyzeBranch family of instruction names consistent	Matt Arsenault	2016-09-14	1	-3/+3
*	AArch64: Use TTI branch functions in branch relaxation	Matt Arsenault	2016-09-14	1	-2/+7
*	[lanai] Small cleanup: remove/comment out unused args	Jacques Pienaar	2016-07-15	1	-14/+12
*	Rename AnalyzeBranch* to analyzeBranch*.	Jacques Pienaar	2016-07-15	1	-1/+1
*	[lanai] Use peephole optimizer to generate more conditional ALU operations.	Jacques Pienaar	2016-07-07	1	-2/+393
*	CodeGen: Use MachineInstr& in TargetInstrInfo, NFC	Duncan P. N. Exon Smith	2016-06-30	1	-31/+30
*	Pass DebugLoc and SDLoc by const ref.	Benjamin Kramer	2016-06-12	1	-2/+3
*	[lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMem...	Jacques Pienaar	2016-04-14	1	-2/+92
*	[lanai] Add Lanai backend.	Jacques Pienaar	2016-03-28	1	-0/+324