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* Rename LoadX to LoadExt.Evan Cheng2008-10-141-6/+6
| | | | llvm-svn: 57526
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-1/+1
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-111-5/+3
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-031-2/+1
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-034-11/+11
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands2008-09-291-1/+1
| | | | | | | instead of hasWeakLinkage in a bunch of optimization passes. llvm-svn: 56782
* Re-apply 56683 with fixes.Evan Cheng2008-09-271-1/+2
| | | | llvm-svn: 56748
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-3/+1
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-1/+3
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* Add "inreg" field to CallSDNode (doesn't increaseDale Johannesen2008-09-262-3/+3
| | | | | | | | | its size). Adjust various lowering functions to pass this info through from CallInst. Use it to implement sseregparm returns on X86. Remove X86_ssecall calling convention. llvm-svn: 56677
* CMake: Builds all targets.Oscar Fuentes2008-09-261-0/+20
| | | | llvm-svn: 56641
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-3/+2
| | | | llvm-svn: 56573
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-9/+1
| | | | llvm-svn: 56572
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | instruction opcodes are now numbered. No functionality change. llvm-svn: 56497
* Make log, log2, log10, exp, exp2 use Expand byDale Johannesen2008-09-221-10/+0
| | | | | | default. llvm-svn: 56471
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-4/+4
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-4/+4
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-122-10/+10
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* Fix constant pool loads, and remove broken versions of addConstantPoolReference.Owen Anderson2008-09-061-12/+0
| | | | llvm-svn: 55868
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+10
| | | | | | No functional change (and no FE change to generate them). llvm-svn: 55753
* fix some 80-col violationsGabor Greif2008-08-302-3/+5
| | | | llvm-svn: 55565
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-282-7/+7
| | | | | | Node to reflect semantics llvm-svn: 55504
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-262-4/+6
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-3/+3
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | from all targets. llvm-svn: 55124
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-214-6/+8
| | | | llvm-svn: 55092
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-142-2/+2
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov2008-08-081-1/+4
| | | | llvm-svn: 54540
* Use EmitAlignment consistentlyAnton Korobeynikov2008-08-071-1/+1
| | | | llvm-svn: 54456
* CleanupAnton Korobeynikov2008-08-071-9/+9
| | | | llvm-svn: 54454
* Switch IA64 to new section-handling stuffAnton Korobeynikov2008-08-073-71/+90
| | | | llvm-svn: 54453
* CleanupAnton Korobeynikov2008-08-071-18/+16
| | | | llvm-svn: 54452
* Rename SDOperand to SDValue.Dan Gohman2008-07-273-137/+137
| | | | llvm-svn: 54128
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
* random bugfix sitting in my tree.Chris Lattner2008-07-091-1/+2
| | | | llvm-svn: 53274
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-072-39/+25
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Add explicit keywords.Dan Gohman2008-07-071-1/+1
| | | | llvm-svn: 53179
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-1/+2
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect itsDan Gohman2008-06-301-1/+1
| | | | | | | | | | | | | | | | | purpose, and give it a custom SDNode subclass so that it doesn't need to have line number, column number, filename string, and directory string, all existing as individual SDNodes to be the operands. This was the only user of ISD::STRING, StringSDNode, etc., so remove those and some associated code. This makes stop-points considerably easier to read in -view-legalize-dags output, and reduces overhead (creating new nodes and copying std::strings into them) on code containing debugging information. llvm-svn: 52924
* Split scheduling from instruction selection.Evan Cheng2008-06-301-7/+4
| | | | llvm-svn: 52923
* Replace some std::vectors that showed up in heap profiling withDan Gohman2008-06-302-7/+4
| | | | | | | | SmallVectors. Change the signature of TargetLowering::LowerArguments to avoid returning a vector by value, and update the two targets which still use this directly, Sparc and IA64, accordingly. llvm-svn: 52917
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-063-22/+21
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Update some comments noticed in a recent checkinNate Begeman2008-05-281-3/+8
| | | | llvm-svn: 51644
* Add chain inputs for loads.Chris Lattner2008-05-281-3/+3
| | | | llvm-svn: 51635
* Fix CodeGen/Generic/2005-10-21-longlonggtu.ll on ia64.Chris Lattner2008-05-281-1/+2
| | | | llvm-svn: 51634
* loads should get chains. THis helps but does not solve ↵Chris Lattner2008-05-281-2/+4
| | | | | | | | CodeGen/Generic/2003-05-27-phifcmpd.ll on ia64. llvm-svn: 51633
* Fix 2006-04-28-Sign-extend-bool.ll for ia64.Chris Lattner2008-05-281-0/+2
| | | | llvm-svn: 51632
* reindent.Chris Lattner2008-05-281-77/+77
| | | | llvm-svn: 51631
* Add CommonLinkage; currently tentative definitionsDale Johannesen2008-05-141-0/+2
| | | | | | | | | | are represented as "weak", but there are subtle differences in some cases on Darwin, so we need both. The intent is that "common" will behave identically to "weak" unless somebody changes their target to do something else. No functional change as yet. llvm-svn: 51118
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