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path: root/llvm/lib/Target/IA64/IA64InstrInfo.cpp
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* Remove the IA-64 backend.Dan Gohman2009-07-241-193/+0
| | | | llvm-svn: 76920
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-4/+4
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* eliminate extra space.Torok Edwin2009-07-141-5/+5
| | | | llvm-svn: 75630
* Remove extra \n from LLVM_UNREACHABLE calls.Torok Edwin2009-07-121-4/+3
| | | | llvm-svn: 75416
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-5/+6
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-4/+4
| | | | | | | | | | | | booleans. This gives a better indication of what the "addReg()" is doing. Remembering what all of those booleans mean isn't easy, especially if you aren't spending all of your time in that code. I took Jakob's suggestion and made it illegal to pass in "true" for the flag. This should hopefully prevent any unintended misuse of this (by reverting to the old way of using addReg()). llvm-svn: 71722
* Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman2009-02-181-18/+4
| | | | llvm-svn: 64891
* Remove non-DebugLoc versions of BuildMI from IA64, Mips.Dale Johannesen2009-02-131-1/+3
| | | | llvm-svn: 64438
* Eliminate a couple of non-DebugLoc BuildMI variants.Dale Johannesen2009-02-121-3/+5
| | | | | | Modify callers. llvm-svn: 64409
* Move debug loc info along when the spiller creates new instructions.Bill Wendling2009-02-121-30/+43
| | | | llvm-svn: 64342
* Change TargetInstrInfo::isMoveInstr to return source and destination ↵Evan Cheng2009-01-201-2/+5
| | | | | | sub-register indices as well. llvm-svn: 62600
* Tidy up #includes, deleting a bunch of unnecessary #includes.Dan Gohman2009-01-051-0/+1
| | | | llvm-svn: 61715
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-8/+8
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-261-3/+5
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-141-1/+1
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-2/+2
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* remove MachineOpCode typedef.Chris Lattner2008-01-071-1/+1
| | | | llvm-svn: 45679
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-0/+108
| | | | llvm-svn: 45484
* Fix a problem where lib/Target/TargetInstrInfo.h would include and useChris Lattner2008-01-011-1/+1
| | | | | | | | | | a header file from libcodegen. This violates a layering order: codegen depends on target, not the other way around. The fix to this is to split TII into two classes, TII and TargetInstrInfoImpl, which defines stuff that depends on libcodegen. It is defined in libcodegen, where the base is not. llvm-svn: 45475
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-0/+18
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ↵Evan Cheng2007-05-181-3/+5
| | | | | | / inserted. llvm-svn: 37192
* Relex assertions to account for additional implicit def / use operands.Evan Cheng2007-04-251-1/+1
| | | | llvm-svn: 36430
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-2/+3
| | | | | | of opcode and number of operands. llvm-svn: 31947
* fix warning about missing newline at end of fileRafael Espindola2006-10-241-1/+1
| | | | llvm-svn: 31162
* implement uncond branch insertion for the branch folding passChris Lattner2006-10-241-0/+7
| | | | llvm-svn: 31159
* add bundling! well not really, for now it's just stop-insertion.Duraid Madina2006-01-251-0/+1
| | | | llvm-svn: 25593
* Convert tabs to spacesMisha Brukman2005-04-221-1/+1
| | | | llvm-svn: 21452
* Remove trailing whitespaceMisha Brukman2005-04-211-2/+2
| | | | llvm-svn: 21424
* and so it begins...Duraid Madina2005-03-171-0/+47
PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! llvm-svn: 20652
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