| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
| |
Patch by Jyotsna Verma.
llvm-svn: 279267
|
|
|
|
| |
llvm-svn: 279265
|
|
|
|
| |
llvm-svn: 279255
|
|
|
|
| |
llvm-svn: 279254
|
|
|
|
|
|
| |
Patch by Arnold Schwaighofer.
llvm-svn: 279251
|
|
|
|
|
|
| |
Patch by Brendon Cahoon.
llvm-svn: 279249
|
|
|
|
| |
llvm-svn: 279248
|
|
|
|
| |
llvm-svn: 279246
|
|
|
|
| |
llvm-svn: 279245
|
|
|
|
| |
llvm-svn: 279244
|
|
|
|
| |
llvm-svn: 279243
|
|
|
|
| |
llvm-svn: 279241
|
|
|
|
|
|
|
|
|
| |
Improved handling of fma, floating point min/max, additional load/store
instructions for floating point types.
Patch by Jyotsna Verma.
llvm-svn: 279239
|
|
|
|
|
|
|
|
|
|
| |
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.
Differential Revision: https://reviews.llvm.org/D23597
llvm-svn: 279129
|
|
|
|
| |
llvm-svn: 279067
|
|
|
|
|
|
| |
Follow up to r278902. I had missed "fall through", with a space.
llvm-svn: 278970
|
|
|
|
|
|
|
| |
This is a mechanical change of comments in switches like fallthrough,
fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.
llvm-svn: 278902
|
|
|
|
| |
llvm-svn: 278878
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
ALIGNA PS_aligna
ALLOCA PS_alloca
TFR_FI PS_fi
TFR_FIA PS_fia
TFR_PdFalse PS_false
TFR_PdTrue PS_true
VMULW PS_vmulw
VMULW_ACC PS_vmulw_acc
llvm-svn: 278832
|
|
|
|
| |
llvm-svn: 278823
|
|
|
|
|
|
|
|
|
|
|
|
| |
- Remove unused instructions: LDriq_pred_vec_V6, STriq_pred_vec_V6, and
the 128B counterparts.
- Rename:
LDriq_pred_V6 PS_vloadrq_ai
LDriq_pred_V6_128B PS_vloadrq_ai_128B
STriq_pred_V6 PS_vstorerq_ai
STriq_pred_V6_128B PS_vstorerq_ai_128B
llvm-svn: 278813
|
|
|
|
|
|
|
|
|
|
|
| |
This adds two new utility functions findLoopControlBlock and findLoopPreheader
to MachineLoop and MachineLoopInfo. These functions are refactored and taken
from the Hexagon target as they are target independent; thus this is intendend to
be a non-functional change.
Differential Revision: https://reviews.llvm.org/D22959
llvm-svn: 278661
|
|
|
|
|
|
|
|
|
|
|
| |
LowerTargetConstantPool is not properly setting the TargetFlag to indicate
desired relocation. Coding error, the offset parameter was omitted, so the
TargetFlag was used as the offset, and the TargetFlag defaulted to zero.
This only affects -fpic compilation, and only those items created in a
Constant Pool, for example a vector of constants. Halide ran into this issue.
llvm-svn: 278614
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Remove the following single-vector load/store pseudo instructions, use real
instructions instead:
LDriv_pseudo_V6 STriv_pseudo_V6
LDriv_pseudo_V6_128B STriv_pseudo_V6_128B
LDrivv_indexed STrivv_indexed
LDrivv_indexed_128B STrivv_indexed_128B
Rename the double-vector load/store pseudo instructions, add unaligned
counterparts:
-- old -- -- new -- -- unaligned --
LDrivv_pseudo_V6 PS_vloadrw_io PS_vloadrwu_io
LDrivv_pseudo_V6_128B PS_vloadrw_io_128B PS_vloadrwu_io_128B
STrivv_pseudo_V6 PS_vstorerw_io PS_vstorerwu_io
STrivv_pseudo_V6_128B PS_vstorerw_io_128 PS_vstorerwu_io_128
llvm-svn: 278564
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
- CALLv3nr PS_call_nr
- CALLRv3nr PS_callr_nr
- CALLstk PS_call_stk
- TCRETURNi PS_tailcall_i
- TCRETURNr PS_tailcall_r
- JMPret PS_jmpret
- JMPrett PS_jmprett
- JMPretf PS_jmpretf
- JMPrettnew PS_jmprettnew
- JMPretfnew PS_jmpretfnew
- JMPrettnewpt PS_jmprettnewpt
- JMPretfnewpt PS_jmpretfnewpt
llvm-svn: 278499
|
|
|
|
| |
llvm-svn: 278498
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Remove all ilist_iterator to pointer casts. There were two reasons for
casts:
- Checking for an uninitialized (i.e., null) iterator. I added
MachineInstrBundleIterator::isValid() to check for that case.
- Comparing an iterator against the underlying pointer value while
avoiding converting the pointer value to an iterator. This is
occasionally necessary in MachineInstrBundleIterator, since there is
an assertion in the constructors that the underlying MachineInstr is
not bundled (but we don't care about that if we're just checking for
pointer equality).
To support the latter case, I rewrote the == and != operators for
ilist_iterator and MachineInstrBundleIterator.
- The implicit constructors now use enable_if to exclude
const-iterator => non-const-iterator conversions from overload
resolution (previously it was a compiler error on instantiation, now
it's SFINAE).
- The == and != operators are now global (friends), and are not
templated.
- MachineInstrBundleIterator has overloads to compare against both
const_pointer and const_reference. This avoids the implicit
conversions to MachineInstrBundleIterator that assert, instead just
checking the address (and I added unit tests to confirm this).
Notably, the only remaining uses of ilist_iterator::getNodePtrUnchecked
are in ilist.h, and no code outside of ilist*.h directly relies on this
UB end-iterator-to-pointer conversion anymore. It's still needed for
ilist_*sentinel_traits, but I'll clean that up soon.
llvm-svn: 278478
|
|
|
|
|
|
| |
No functionality change is intended.
llvm-svn: 278475
|
|
|
|
|
|
|
|
|
| |
If the result of the find is only used to compare against end(), just
use is_contained instead.
No functionality change is intended.
llvm-svn: 278469
|
|
|
|
|
|
| |
No functionality change is intended.
llvm-svn: 278443
|
|
|
|
|
|
|
|
|
| |
If the result of the find is only used to compare against end(), just
use is_contained instead.
No functionality change is intended.
llvm-svn: 278433
|
|
|
|
|
|
| |
No functionality change is intended.
llvm-svn: 278417
|
|
|
|
| |
llvm-svn: 278416
|
|
|
|
|
|
|
|
| |
- PS_pselect: general register pairs
- PS_vselect: vector registers (+ 128B version)
- PS_wselect: vector register pairs (+ 128B version)
llvm-svn: 278390
|
|
|
|
|
|
|
|
|
|
| |
From the point of view of register assignment, byval parameters are
ignored: a byval parameter is not going to be assigned to a register,
and it will not affect the assignments of subsequent parameters.
When matching registers with parameters in the bit tracker, make sure
to skip byval parameters before advancing the registers.
llvm-svn: 278375
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Check for end() before skipping through debug values. This avoids
dereferencing end() when the instruction is the final one in the basic
block. (It still assumes that a debug value will not be the final
instruction in the basic block. No tests seemed to violate that.)
Many Hexagon tests trigger this, but they happen to magically pass right
now. I found this because WIP patches for PR26753 convert them into
crashes.
llvm-svn: 278355
|
|
|
|
| |
llvm-svn: 278266
|
|
|
|
| |
llvm-svn: 278256
|
|
|
|
| |
llvm-svn: 278252
|
|
|
|
| |
llvm-svn: 278247
|
|
|
|
|
|
|
|
|
|
|
|
| |
Floating point instructions use general purpose registers, so the few
instructions that can put floating point immediates into registers are,
in fact, integer instruction. Use them explicitly instead of having
pseudo-instructions specifically for dealing with floating point values.
Simplify the constant loading instructions (from sdata) to have only two:
one for 32-bit values and one for 64-bit values: CONST32 and CONST64.
llvm-svn: 278244
|
|
|
|
|
|
|
| |
This file is not used. The location assignment of call arguments and
return values is implemented directly in HexagonISelLowering.
llvm-svn: 278237
|
|
|
|
| |
llvm-svn: 278236
|
|
|
|
| |
llvm-svn: 278040
|
|
|
|
| |
llvm-svn: 277916
|
|
|
|
| |
llvm-svn: 277740
|
|
|
|
| |
llvm-svn: 277727
|
|
|
|
| |
llvm-svn: 277626
|
|
|
|
| |
llvm-svn: 277622
|
|
|
|
| |
llvm-svn: 277605
|