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author | Michael Kuperstein <mkuper@google.com> | 2016-08-18 20:08:15 +0000 |
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committer | Michael Kuperstein <mkuper@google.com> | 2016-08-18 20:08:15 +0000 |
commit | 2bc3d4d46c5f19d8433fd088fa95d18f9707bde8 (patch) | |
tree | 1bf251351a4472649c63fb3f1bc7f2f056386f1f /llvm/lib/Target/Hexagon | |
parent | dea5ccb04b8be312456a5bdb6483cfb0fcb5b962 (diff) | |
download | bcm5719-llvm-2bc3d4d46c5f19d8433fd088fa95d18f9707bde8.tar.gz bcm5719-llvm-2bc3d4d46c5f19d8433fd088fa95d18f9707bde8.zip |
[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.
Differential Revision: https://reviews.llvm.org/D23597
llvm-svn: 279129
Diffstat (limited to 'llvm/lib/Target/Hexagon')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index ef45217744b..55e9b5dc709 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -1906,7 +1906,7 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM, } // Turn FP truncstore into trunc + store. setTruncStoreAction(MVT::f64, MVT::f32, Expand); - // Turn FP extload into load/fextend. + // Turn FP extload into load/fpextend. for (MVT VT : MVT::fp_valuetypes()) setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td b/llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td index 3c0baa53edc..2f40ce22e1b 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td @@ -564,10 +564,10 @@ class F2_RD_RS_CONVERT<string mnemonic, bits<3> MajOp, bits<3> MinOp, // Convert single precision to double precision and vice-versa. def F2_conv_sf2df : F2_RDD_RS_CONVERT <"convert_sf2df", 0b000, - fextend, F64, F32>; + fpextend, F64, F32>; def F2_conv_df2sf : F2_RD_RSS_CONVERT <"convert_df2sf", 0b000, - fround, F32, F64>; + fpround, F32, F64>; // Convert Integer to Floating Point. def F2_conv_d2sf : F2_RD_RSS_CONVERT <"convert_d2sf", 0b010, |