| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 240055
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tests that test packet brackets.
llvm-svn: 240051
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shows correct ELF symbol.
llvm-svn: 239876
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llvm-svn: 239826
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offset of the relocation. Set relocation addend and check it's correct in the ELF.
llvm-svn: 239769
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Fixes PR23839.
llvm-svn: 239751
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files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it.
llvm-svn: 239744
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operand types disassemble correctly.
llvm-svn: 239477
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llvm-svn: 239475
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create*MCSubtargetInfo(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.
Reviewers: rafael
Reviewed By: rafael
Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski
Differential Revision: http://reviews.llvm.org/D10311
llvm-svn: 239467
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create*AsmBackend(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.
Reviewers: echristo, rafael
Reviewed By: rafael
Subscribers: rafael, llvm-commits, rengolin
Differential Revision: http://reviews.llvm.org/D10243
llvm-svn: 239464
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llvm-svn: 239370
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Compound instructions reduce slot resource requirements freeing those packet slots up for more instructions.
llvm-svn: 239307
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llvm-svn: 239161
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llvm-svn: 239102
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compress commonly used pairs of instructions in order to reduce code size. The test case duplex.ll normally would be 8 bytes, assign register to 0 and jump to link register. After duplexing this is only 4 bytes. This also tests the HexagonMCShuffler code path which is used to make sure duplexed instructions still follow slot requirements.
llvm-svn: 239095
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Less code, clearer and more efficient. No functionality change intended.
llvm-svn: 239040
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create*AsmInfo(). NFC.
Summary:
This is the first of several patches to eliminate StringRef forms of GNU
triples from the internals of LLVM. After this is complete, GNU triples
will be replaced by a more authoratitive representation in the form of
an LLVM TargetTuple.
Reviewers: rengolin
Reviewed By: rengolin
Subscribers: ted, llvm-commits, rengolin, jholewinski
Differential Revision: http://reviews.llvm.org/D10236
llvm-svn: 239036
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variable issue was fixed. Removing re-registering ASM backend.
llvm-svn: 238949
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to make sure it is.
llvm-svn: 238947
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advanced relaxation codepath."
This reverts commit r238748.
It broke the msan bot:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/4372/steps/check-llvm%20msan/logs/stdio
llvm-svn: 238772
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relaxation codepath.
llvm-svn: 238748
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llvm-svn: 238695
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llvm-svn: 238694
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llvm-svn: 238692
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llvm-svn: 238664
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llvm-svn: 238660
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llvm-svn: 238634
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at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch.
llvm-svn: 238556
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llvm-svn: 237481
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s/InitMCCodeGenInfo/initMCCodeGenInfo/
llvm-svn: 237471
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s/EncodeInstruction/encodeInstruction/
llvm-svn: 237469
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s/MCFixup::Create/MCFixup::create/
llvm-svn: 237468
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MCOperand::Create*() methods renamed to MCOperand::create*().
llvm-svn: 237275
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llvm-svn: 236436
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llvm-svn: 236351
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hits this code path.
llvm-svn: 236348
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Use a loop instruction with a constant extender for a hardware
loop instruction that is too far away from the start of the loop.
This is cheaper than changing the SA register value.
Differential Revision: http://reviews.llvm.org/D9262
llvm-svn: 235882
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llvm-svn: 235514
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The ELF object writer will take advantage of that in the next commit.
llvm-svn: 234950
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The patch is generated using clang-tidy misc-use-override check.
This command was used:
tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py \
-checks='-*,misc-use-override' -header-filter='llvm|clang' \
-j=32 -fix -format
http://reviews.llvm.org/D8925
llvm-svn: 234679
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llvm-svn: 234525
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llvm-svn: 234506
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an MCInstPrinter. Update all callers and use where we wanted a Triple
previously.
llvm-svn: 233648
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llvm-svn: 233607
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per-function subtarget.
Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.
This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates.
I will follow up with changes to instprinters of AArch64, ARM, and X86.
llvm-svn: 233411
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llvm-svn: 232998
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This removes duplicated code from backends that don't need to do anything
fancy.
llvm-svn: 232658
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llvm-svn: 232429
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llvm-svn: 232428
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