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* Rename and adjust processFixupValue.Rafael Espindola2017-06-301-9/+6
| | | | | | | It was not processing any value. All that it ever did was force relocations, so name it shouldForceRelocation. llvm-svn: 306906
* Simplify the processFixupValue interface. NFC.Rafael Espindola2017-06-241-4/+2
| | | | llvm-svn: 306202
* Remove redundant argument.Rafael Espindola2017-06-241-2/+1
| | | | llvm-svn: 306189
* ARM: move some logic from processFixupValue to applyFixup.Rafael Espindola2017-06-231-1/+2
| | | | | | | | | | | | processFixupValue is called on every relaxation iteration. applyFixup is only called once at the very end. applyFixup is then the correct place to do last minute changes and value checks. While here, do proper range checks again for fixup_arm_thumb_bl. We used to do it, but dropped because of thumb2. We now do it again, but use the thumb2 range. llvm-svn: 306177
* [Hexagon] Handle a global operand to A2_addi when creating duplexesKrzysztof Parzyszek2017-06-221-27/+26
| | | | llvm-svn: 306012
* Use a MutableArrayRef. NFC.Rafael Espindola2017-06-211-4/+4
| | | | llvm-svn: 305968
* Move Object format code to lib/BinaryFormat.Zachary Turner2017-06-072-2/+2
| | | | | | | | | | | | This creates a new library called BinaryFormat that has all of the headers from llvm/Support containing structure and layout definitions for various types of binary formats like dwarf, coff, elf, etc as well as the code for identifying a file from its magic. Differential Revision: https://reviews.llvm.org/D33843 llvm-svn: 304864
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-065-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* [Hexagon] Remove C6 and C7 as separate registersKrzysztof Parzyszek2017-05-051-8/+0
| | | | | | | These are M0 and M1. Removing duplicated registers reduces the number of explicit register aliasing. llvm-svn: 302306
* [Hexagon] Use automatically-generated scheduling information for HVXKrzysztof Parzyszek2017-05-032-6/+5
| | | | | | Patch by Jyotsna Verma. llvm-svn: 302073
* [Hexagon] Change iconst to emit 27bit relocationKrzysztof Parzyszek2017-05-028-15/+19
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301956
* [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCRELKrzysztof Parzyszek2017-05-024-3/+42
| | | | | | Patch by Sid Manning. llvm-svn: 301955
* [Hexagon] Formatting changes, NFCKrzysztof Parzyszek2017-05-024-8/+13
| | | | llvm-svn: 301953
* [Hexagon] Remove unused validSubtarget TSFlagsKrzysztof Parzyszek2017-05-023-24/+0
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301952
* [Hexagon] Make sure duplexed dealloc_returns are checked for double jumpsKrzysztof Parzyszek2017-05-021-0/+8
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301951
* [Hexagon] Move checking AXOK to checkerKrzysztof Parzyszek2017-05-023-69/+80
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301949
* [Hexagon] Remove unneeded code from HexagonShufflerKrzysztof Parzyszek2017-05-022-11/+9
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301947
* [Hexagon] Extract function that checks endloops with other branchesKrzysztof Parzyszek2017-05-022-36/+39
| | | | | | | | Change location number to point to conflicting branch instruction. Patch by Colin LeMahieu. llvm-svn: 301946
* [Hexagon] Add new packet iterator which will iterate through duplexesKrzysztof Parzyszek2017-05-023-24/+82
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301945
* [Hexagon] Check for .cur def without use without using a map data structureKrzysztof Parzyszek2017-05-022-24/+42
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301943
* [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LDKrzysztof Parzyszek2017-05-015-6/+12
| | | | | | | | A .cur instruction can be identified by checking isCVINew() && mayLoad(). Patch by Colin LeMahieu. llvm-svn: 301829
* [Hexagon] Improving error reporting for writing to read only registersKrzysztof Parzyszek2017-05-012-7/+22
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301828
* [Hexagon] Give better error messages for solo instruction errorsKrzysztof Parzyszek2017-05-012-7/+11
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301827
* [Hexagon] Improve shuffle error reportingKrzysztof Parzyszek2017-05-019-401/+272
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301823
* This patch closes PR#32216: Better testing of schedule model instruction ↵Andrew V. Tischenko2017-04-142-2/+3
| | | | | | | | latencies/throughputs. The details are here: https://reviews.llvm.org/D30941 llvm-svn: 300311
* [Hexagon] Change the vector scaling for vector offsetsKrzysztof Parzyszek2017-04-062-48/+0
| | | | | | | Keep full offset value on MI-level instructions, but have it scaled down in the MC-level instructions. llvm-svn: 299664
* Add MCContext argument to MCAsmBackend::applyFixup for error reportingAlex Bradbury2017-04-051-1/+2
| | | | | | | | | | | | | | | | A number of backends (AArch64, MIPS, ARM) have been using MCContext::reportError to report issues such as out-of-range fixup values in their TgtAsmBackend. This is great, but because MCContext couldn't easily be threaded through to the adjustFixupValue helper function from its usual callsite (applyFixup), these backends ended up adding an MCContext* argument and adding another call to applyFixup to processFixupValue. Adding an MCContext parameter to applyFixup makes this unnecessary, and even better - applyFixup can take a reference to MCContext rather than a potentially null pointer. Differential Revision: https://reviews.llvm.org/D30264 llvm-svn: 299529
* [Hexagon] Remove unused variablesKrzysztof Parzyszek2017-03-311-11/+2
| | | | | | Found by PVS-Studio. Fixes llvm.org/PR31676. llvm-svn: 299262
* [Hexagon] Updating inline saturate lanes for v62 version.Colin LeMahieu2017-03-161-1/+4
| | | | llvm-svn: 297920
* [Hexagon] Add -mhvx option to the Hexagon backendKrzysztof Parzyszek2017-03-091-2/+8
| | | | llvm-svn: 297393
* Fix 'variable set but not used' warning when assertions are disabled.Simon Pilgrim2017-02-191-0/+2
| | | | llvm-svn: 295585
* Move symbols from the global namespace into (anonymous) namespaces. NFC.Benjamin Kramer2017-02-112-5/+3
| | | | llvm-svn: 294837
* [Hexagon] Introduce Hexagon V62Krzysztof Parzyszek2017-02-101-4/+11
| | | | llvm-svn: 294805
* [Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek2017-02-104-60/+22
| | | | llvm-svn: 294753
* [Hexagon] Update instruction typesKrzysztof Parzyszek2017-02-072-14/+27
| | | | | | | | | Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their architecture counterparts. Patch by Colin LeMahieu. llvm-svn: 294321
* [Hexagon] Address ASAN and UBSAN failures after r294226Krzysztof Parzyszek2017-02-074-16/+18
| | | | | | Reinstate r294256 with a fix. llvm-svn: 294269
* Revert "[Hexagon] Address ASAN and UBSAN failures after r294226"Krzysztof Parzyszek2017-02-063-15/+13
| | | | | | | This reverts commit r294256. It seems to be causing more problems instead of solving them. llvm-svn: 294259
* [Hexagon] Address ASAN and UBSAN failures after r294226Krzysztof Parzyszek2017-02-063-13/+15
| | | | llvm-svn: 294256
* [Hexagon] Update MCTargetDescKrzysztof Parzyszek2017-02-0619-665/+1032
| | | | | | | | | | Changes include: - Updates to the instruction descriptor flags. - Improvements to the packet shuffler and checker. - Updates to the handling of certain relocations. - Better handling of duplex instructions. llvm-svn: 294226
* [Hexagon] Adding opExtentBits and opExtentAlign to GPrel instructionsKrzysztof Parzyszek2017-02-022-10/+36
| | | | | | Patch by Colin LeMahieu. llvm-svn: 293933
* [Hexagon] Fix relocation kind for extended predicated callsKrzysztof Parzyszek2017-02-021-5/+7
| | | | | | Patch by Sid Manning. llvm-svn: 293931
* [Hexagon] Remove A4_ext_* pseudo instructionsKrzysztof Parzyszek2017-02-024-29/+33
| | | | | | Patch by Colin LeMahieu. llvm-svn: 293929
* [Hexagon] Emitting individual instructions without copying themKrzysztof Parzyszek2017-02-022-97/+82
| | | | | | Patch by Colin LeMahieu. llvm-svn: 293899
* [Hexagon] Rename TypeCOMPOUND to TypeCJKrzysztof Parzyszek2017-02-024-6/+5
| | | | llvm-svn: 293894
* [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use ↵Eugene Zelenko2017-01-041-29/+16
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 290925
* [Hexagon] Other attempt to fix build with enabled asserts broken in 290024 ↵Eugene Zelenko2016-12-171-0/+1
| | | | | | (NFC). llvm-svn: 290028
* [Hexagon] Fix build with enabled asserts broken in 290024 (NFC).Eugene Zelenko2016-12-171-0/+1
| | | | llvm-svn: 290027
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2016-12-174-34/+52
| | | | | | other minor fixes (NFC). llvm-svn: 290024
* [Hexagon] Changing from literal numeric value to argument since #-1 will not ↵Colin LeMahieu2016-12-051-4/+2
| | | | | | parse when '-' is converted to a token. llvm-svn: 288634
* Check that emitted instructions meet their predicates on all targets except ↵Daniel Sanders2016-11-192-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM, Mips, and X86. Summary: * ARM is omitted from this patch because this check appears to expose bugs in this target. * Mips is omitted from this patch because this check either detects bugs or deliberate emission of instructions that don't satisfy their predicates. One deliberate use is the SYNC instruction where the version with an operand is correctly defined as requiring MIPS32 while the version without an operand is defined as an alias of 'SYNC 0' and requires MIPS2. * X86 is omitted from this patch because it doesn't use the tablegen-erated MCCodeEmitter infrastructure. Patches for ARM and Mips will follow. Depends on D25617 Reviewers: tstellarAMD, jmolloy Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits Differential Revision: https://reviews.llvm.org/D25618 llvm-svn: 287439
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