bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX	Krzysztof Parzyszek	2019-09-23	1	-16/+7
\| \| \| \|	llvm-svn: 372616
*	[Hexagon] Generate min/max instructions for 64-bit vectors	Krzysztof Parzyszek	2019-08-16	1	-22/+10
\| \| \| \|	llvm-svn: 369124
*	[Hexagon] Generate vector min/max for HVX	Krzysztof Parzyszek	2019-08-15	1	-0/+25
\| \| \| \|	llvm-svn: 369014
*	[Hexagon] Remove 'T' from HasVNN predicates, NFC	Krzysztof Parzyszek	2018-06-20	1	-1/+1
\| \| \| \| \| \|	Patch by Sumanth Gundapaneni. llvm-svn: 335124
*	[Hexagon] Implement vector-pair zero as V6_vsubw_dv	Krzysztof Parzyszek	2018-06-06	1	-4/+7
\| \| \| \|	llvm-svn: 334123
*	[Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZ	Krzysztof Parzyszek	2018-06-01	1	-0/+27
\| \| \| \|	llvm-svn: 333760
*	[Hexagon] Add patterns for accumulating HVX compares	Krzysztof Parzyszek	2018-05-22	1	-73/+99
\| \| \| \|	llvm-svn: 333009
*	[Hexagon] Fix the order of operands when selecting QCAT	Krzysztof Parzyszek	2018-05-16	1	-2/+2
\| \| \| \|	llvm-svn: 332526
*	[Hexagon] Mark HVX vector predicate bitwise ops as legal, add patterns	Krzysztof Parzyszek	2018-05-16	1	-24/+46
\| \| \| \|	llvm-svn: 332525
*	[Hexagon] Add patterns for vector shift-and-accumulate	Krzysztof Parzyszek	2018-05-09	1	-0/+5
\| \| \| \|	llvm-svn: 331918
*	[Hexagon] Improve HVX instruction selection (bitcast, vsplat)	Krzysztof Parzyszek	2018-04-20	1	-29/+64
\| \| \| \| \| \| \| \| \| \|	There was some unfortunate interaction between VSPLAT and BITCAST related to the selection of constant vectors (coming from selecting shuffles). Introduce VSPLATW that always splats a 32-bit word, and can have arbitrary result type (to avoid BITCASTs of VSPLAT). Clean up the previous selection of BITCAST/VSPLAT. llvm-svn: 330471
*	[Hexagon] Generate code for vector bswap intrinsics	Krzysztof Parzyszek	2018-04-19	1	-0/+5
\| \| \| \|	llvm-svn: 330333
*	[Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned ones	Krzysztof Parzyszek	2018-03-07	1	-10/+0
\| \| \| \| \| \| \| \| \|	This is a follow-up to r325169, this time for all types, not just HVX vector types. Disable this by default, since it's not always safe. llvm-svn: 326915
*	[Hexagon] Split HVX vector pair loads/stores, expand unaligned loads	Krzysztof Parzyszek	2018-02-14	1	-43/+82
\| \| \| \|	llvm-svn: 325169
*	[Hexagon] Add code to select QTRUE and QFALSE	Krzysztof Parzyszek	2018-02-09	1	-0/+7
\| \| \| \| \| \|	Fixes http://llvm.org/PR36320. llvm-svn: 324763
*	[Hexagon] Extract HVX lowering and selection into HVX-specific files, NFC	Krzysztof Parzyszek	2018-02-06	1	-0/+338
	llvm-svn: 324392