| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove unused argument to CreateTargetScheduleState and change | Eric Christopher | 2014-10-09 | 1 | -6/+4 |
| * | Fix undefined behavior (left shift of negative value) in Hexagon backend. | Alexey Samsonov | 2014-08-20 | 1 | -3/+3 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -1/+2 |
| * | Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the... | Craig Topper | 2014-06-19 | 1 | -4/+3 |
| * | [C++] Use 'nullptr'. Target edition. | Craig Topper | 2014-04-25 | 1 | -6/+6 |
| * | [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some | Chandler Carruth | 2014-04-22 | 1 | -4/+5 |
| * | [Modules] Make Support/Debug.h modular. This requires it to not change | Chandler Carruth | 2014-04-21 | 1 | -0/+2 |
| * | Replace PROLOG_LABEL with a new CFI_INSTRUCTION. | Rafael Espindola | 2014-03-07 | 1 | -1/+1 |
| * | [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. | Benjamin Kramer | 2014-03-02 | 1 | -1/+1 |
| * | Fix known typos | Alp Toker | 2014-01-24 | 1 | -2/+2 |
| * | Correct word hyphenations | Alp Toker | 2013-12-05 | 1 | -1/+1 |
| * | [weak vtables] Remove a bunch of weak vtables | Juergen Ributzka | 2013-11-19 | 1 | -1/+3 |
| * | Revert r194865 and r194874. | Alexey Samsonov | 2013-11-18 | 1 | -3/+1 |
| * | [weak vtables] Remove a bunch of weak vtables | Juergen Ributzka | 2013-11-15 | 1 | -1/+3 |
| * | DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI... | David Blaikie | 2013-06-16 | 1 | -10/+0 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -1/+1 |
| * | Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore. | Jyotsna Verma | 2013-05-10 | 1 | -0/+35 |
| * | Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. | Jyotsna Verma | 2013-05-10 | 1 | -105/+42 |
| * | Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions. | Jyotsna Verma | 2013-05-09 | 1 | -77/+42 |
| * | Hexagon: Use relation map for getMatchingCondBranchOpcode() and | Jyotsna Verma | 2013-05-09 | 1 | -535/+5 |
| * | Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions. | Jyotsna Verma | 2013-05-06 | 1 | -222/+57 |
| * | Fix missing include in Hexagon code for Release+Asserts | Reid Kleckner | 2013-05-03 | 1 | -0/+1 |
| * | reverting r180953 | Jyotsna Verma | 2013-05-02 | 1 | -57/+222 |
| * | Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions. | Jyotsna Verma | 2013-05-02 | 1 | -222/+57 |
| * | Hexagon: Honor __builtin_expect by using branch probabilities. | Jyotsna Verma | 2013-05-02 | 1 | -0/+28 |
| * | Hexagon: Use multiclass for Jump instructions. | Jyotsna Verma | 2013-05-01 | 1 | -56/+92 |
| * | Hexagon: Clear isKill flag on the predicate register in | Jyotsna Verma | 2013-05-01 | 1 | -1/+5 |
| * | Hexagon: Remove assembler mapped instruction definitions. | Jyotsna Verma | 2013-04-23 | 1 | -8/+0 |
| * | Hexagon: Remove duplicate instructions to handle global/immediate values | Jyotsna Verma | 2013-04-23 | 1 | -15/+0 |
| * | Hexagon: Add emitFrameIndexDebugValue function to emit debug information. | Jyotsna Verma | 2013-03-29 | 1 | -0/+9 |
| * | Hexagon: Replace switch-case in isDotNewInst with TSFlags. | Jyotsna Verma | 2013-03-28 | 1 | -0/+14 |
| * | Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and w... | Jyotsna Verma | 2013-03-22 | 1 | -73/+44 |
| * | Hexagon: Removed asserts regarding alignment and offset. | Jyotsna Verma | 2013-03-14 | 1 | -5/+4 |
| * | Hexagon: Use MO operand flags to mark constant extended instructions. | Jyotsna Verma | 2013-03-05 | 1 | -454/+37 |
| * | Hexagon: Add constant extender support framework. | Jyotsna Verma | 2013-03-01 | 1 | -0/+171 |
| * | Hexagon: add support for predicate-GPR copies. | Anshuman Dasgupta | 2013-02-13 | 1 | -0/+12 |
| * | Hexagon: Use absolute addressing mode loads/stores for global+offset | Jyotsna Verma | 2013-02-13 | 1 | -127/+0 |
| * | Hexagon: Add support to generate predicated absolute addressing mode | Jyotsna Verma | 2013-02-12 | 1 | -20/+123 |
| * | Extend Hexagon hardware loop generation to handle various additional cases: | Krzysztof Parzyszek | 2013-02-11 | 1 | -0/+3 |
| * | Implement HexagonInstrInfo::analyzeCompare. | Krzysztof Parzyszek | 2013-02-11 | 1 | -0/+82 |
| * | Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats". | Jyotsna Verma | 2013-02-01 | 1 | -72/+0 |
| * | Add indexed load/store instructions for offset validation check. | Jyotsna Verma | 2013-01-17 | 1 | -0/+4 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -3/+3 |
| * | Use multiclass for 'transfer' instructions. | Jyotsna Verma | 2012-11-29 | 1 | -1/+1 |
| * | Removing some unused instruction definitions from the Hexagon backend. | Jyotsna Verma | 2012-11-20 | 1 | -18/+0 |
| * | Use the relationship models infrastructure to add two relations - getPredOpcode | Pranav Bhandarkar | 2012-11-01 | 1 | -18/+10 |
| * | *typo: Cyles changed to Cycles | Kay Tiong Khoo | 2012-06-13 | 1 | -1/+1 |
| * | Revert 156634 upon request until code improvement changes are made. | Brendon Cahoon | 2012-05-14 | 1 | -168/+17 |
| * | Hexagon: Initialize TBB to 0. | Benjamin Kramer | 2012-05-13 | 1 | -0/+1 |
| * | Make sure new value jump is enabled for Hexagon V5 as well. | Sirish Pande | 2012-05-12 | 1 | -10/+27 |
