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path: root/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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* [Hexagon] Update AnalyzeBranch, etc target hooksBrendon Cahoon2015-05-081-266/+333
| | | | | | | | | | | | | Improved the AnalyzeBranch, InsertBranch, and RemoveBranch functions in order to handle more of our branch instructions. This requires changes to analyzeCompare and PredicateInstructions. Specifically, we've added support for new value compare jumps, improved handling of endloop, added more compare instructions, and improved support for predicate instructions. Differential Revision: http://reviews.llvm.org/D9559 llvm-svn: 236876
* [Hexagon] Use constant extenders to fix up hardware loopsBrendon Cahoon2015-04-271-3/+24
| | | | | | | | | | Use a loop instruction with a constant extender for a hardware loop instruction that is too far away from the start of the loop. This is cheaper than changing the SA register value. Differential Revision: http://reviews.llvm.org/D9262 llvm-svn: 235882
* [Hexagon] Use A2_tfrsi for constant pool and jump table addressesKrzysztof Parzyszek2015-04-221-1/+2
| | | | llvm-svn: 235535
* [Hexagon] Consider constant-extended offsets to be validKrzysztof Parzyszek2015-04-221-9/+14
| | | | llvm-svn: 235529
* [Hexagon] Overhaul of stack object allocationKrzysztof Parzyszek2015-04-221-0/+6
| | | | | | | | - Use static allocation for aligned stack objects. - Simplify dynamic stack object allocation. - Simplify elimination of frame-indices. llvm-svn: 235521
* Expand MUX instructions early on HexagonKrzysztof Parzyszek2015-03-311-3/+2
| | | | | | This time with all files included. llvm-svn: 233696
* Revert 233694. Weak SVN-fu.Krzysztof Parzyszek2015-03-311-2/+3
| | | | llvm-svn: 233695
* Expand MUX instructions early on HexagonKrzysztof Parzyszek2015-03-311-3/+2
| | | | llvm-svn: 233694
* [Hexagon] Add support for vector instructionsKrzysztof Parzyszek2015-03-191-0/+51
| | | | llvm-svn: 232728
* [Hexagon] ENDLOOP is a non-reversible conditional branchKrzysztof Parzyszek2015-03-191-0/+2
| | | | llvm-svn: 232725
* [Hexagon] Use pseudo-instructions for true/false predicate valuesKrzysztof Parzyszek2015-03-181-0/+18
| | | | llvm-svn: 232657
* [Hexagon] Intrinsics for circular and bit-reversed loads and storesKrzysztof Parzyszek2015-03-181-1/+14
| | | | llvm-svn: 232645
* [Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranchKrzysztof Parzyszek2015-03-181-19/+28
| | | | llvm-svn: 232643
* Remove subtarget dependence from HexagonRegisterInfo.Eric Christopher2015-03-101-4/+2
| | | | llvm-svn: 231887
* [Hexagon] Use single tailcall pseudoinst and fix checking for label jumping ↵Colin LeMahieu2015-03-091-4/+27
| | | | | | versus tail calling. llvm-svn: 231713
* [Hexagon] Reapply r231699. Remove assumption that second operand is an ↵Colin LeMahieu2015-03-091-2/+2
| | | | | | immediate when checking if A2_tfrsi is combinable. llvm-svn: 231710
* ArrayRefize memory operand folding. NFC.Benjamin Kramer2015-02-281-4/+3
| | | | llvm-svn: 230846
* Fix the clang -Werror build (-Wunused-variable)David Blaikie2015-02-101-3/+0
| | | | llvm-svn: 228635
* [Hexagon] Removing more V4 predicates since V4 is the required minimum.Colin LeMahieu2015-02-091-21/+4
| | | | llvm-svn: 228614
* [Hexagon] Renaming A2_addi and formatting.Colin LeMahieu2015-02-051-4/+4
| | | | llvm-svn: 228318
* [Hexagon] Adding encoding information for absolute-reg mode stores. ↵Colin LeMahieu2015-02-041-6/+6
| | | | | | Xfailing a test until constant extenders are correctly put in the same packet. llvm-svn: 228158
* [Hexagon] Replacing old versions of stores and loads.Colin LeMahieu2015-01-151-17/+0
| | | | llvm-svn: 226065
* [Hexagon] Replacing old version of convert and load f64.Colin LeMahieu2015-01-141-1/+0
| | | | llvm-svn: 226057
* [Hexagon] Removing old versions of cmph and updating references.Colin LeMahieu2015-01-141-12/+10
| | | | llvm-svn: 226013
* [Hexagon] Removing old versions of cmpb and updating references.Colin LeMahieu2015-01-141-10/+8
| | | | llvm-svn: 226006
* [Hexagon] Deleting versions of compare-not that don't have encoding ↵Colin LeMahieu2015-01-141-2/+2
| | | | | | information. Updating references. llvm-svn: 226003
* [Hexagon] Adding dealloc_return encoding and absolute address stores.Colin LeMahieu2015-01-061-22/+22
| | | | llvm-svn: 225267
* [Hexagon] Adding add/sub with carry, logical shift left by immediate and ↵Colin LeMahieu2015-01-051-43/+43
| | | | | | memop instructions. Removing old defs without bits and updating references. llvm-svn: 225210
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition ↵Craig Topper2015-01-051-1/+1
| | | | | | into the assert. llvm-svn: 225160
* [Hexagon] Removing old newvalue store variants. Adding postincrement ↵Colin LeMahieu2014-12-301-5/+5
| | | | | | immediate newvalue stores. llvm-svn: 225009
* [Hexagon] Adding indexed store new-value variants.Colin LeMahieu2014-12-301-1/+1
| | | | llvm-svn: 225007
* [Hexagon] Adding indexed store of immediates.Colin LeMahieu2014-12-301-9/+9
| | | | llvm-svn: 225006
* [Hexagon] Adding indexed stores.Colin LeMahieu2014-12-301-7/+8
| | | | llvm-svn: 225005
* [Hexagon] Adding reg-reg indexed load forms.Colin LeMahieu2014-12-301-24/+24
| | | | llvm-svn: 224997
* [Hexagon] Adding post-increment register form stores and register-immediate ↵Colin LeMahieu2014-12-291-36/+26
| | | | | | form stores with tests. llvm-svn: 224952
* [Hexagon] Replacing the remaining postincrement stores with versions that ↵Colin LeMahieu2014-12-291-6/+6
| | | | | | have encoding bits. llvm-svn: 224951
* [Hexagon] Renaming old multiclass for removal. Adding post-increment store ↵Colin LeMahieu2014-12-291-2/+2
| | | | | | classes and instruction defs. llvm-svn: 224949
* [Hexagon] Adding remaining post-increment instruction variants. Removing ↵Colin LeMahieu2014-12-261-12/+12
| | | | | | unused classes. llvm-svn: 224868
* [Hexagon] Adding post-increment unsigned byte loads.Colin LeMahieu2014-12-261-3/+3
| | | | llvm-svn: 224867
* [Hexagon] Adding post-increment signed byte loads with tests.Colin LeMahieu2014-12-261-3/+3
| | | | llvm-svn: 224866
* [Hexagon] Adding doubleword load.Colin LeMahieu2014-12-231-10/+6
| | | | llvm-svn: 224787
* [Hexagon] Reapplying 224775 load words.Colin LeMahieu2014-12-231-10/+6
| | | | llvm-svn: 224786
* Reverting 224775 until mayLoad flag is addressed.Colin LeMahieu2014-12-231-6/+10
| | | | llvm-svn: 224783
* [Hexagon] Adding word loads.Colin LeMahieu2014-12-231-10/+6
| | | | llvm-svn: 224775
* [Hexagon] Adding signed halfword loads.Colin LeMahieu2014-12-231-8/+5
| | | | llvm-svn: 224774
* [Hexagon] Adding unsigned halfword load.Colin LeMahieu2014-12-231-7/+4
| | | | llvm-svn: 224772
* [Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.Colin LeMahieu2014-12-221-8/+5
| | | | llvm-svn: 224735
* [Hexagon] Adding classes and load unsigned byte instruction, updating usages.Colin LeMahieu2014-12-221-8/+5
| | | | llvm-svn: 224730
* [Hexagon] Removing old variants of instructions and updating references.Colin LeMahieu2014-12-191-1/+1
| | | | llvm-svn: 224612
* [Hexagon] Adding doubleregs for control registers. Renaming control ↵Colin LeMahieu2014-12-191-1/+1
| | | | | | register class. llvm-svn: 224598
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