summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
Commit message (Expand)AuthorAgeFilesLines
* [Hexagon] Use proper predicate register state when expanding PS_vselectKrzysztof Parzyszek2017-06-271-3/+15
* [Hexagon] Handle cases when the aligned stack pointer is missingKrzysztof Parzyszek2017-06-261-8/+2
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-3/+3
* [Hexagon] Return 0 from getDotNewPredOp when .new opcode does not existKrzysztof Parzyszek2017-06-021-3/+1
* [Hexagon] Fix dependence check in the packetizerKrzysztof Parzyszek2017-06-011-158/+12
* LivePhysRegs: Rework constructor + documentation; NFCMatthias Braun2017-05-261-2/+2
* [Hexagon] Disable predicated calls by defaultKrzysztof Parzyszek2017-05-051-1/+9
* [Hexagon] Use automatically-generated scheduling information for HVXKrzysztof Parzyszek2017-05-031-82/+60
* [Hexagon] Handle S2_storerf_io in HexagonInstrInfoKrzysztof Parzyszek2017-05-031-0/+1
* [Hexagon] Misc fixes in HexagonInstrInfo, NFCKrzysztof Parzyszek2017-05-031-15/+2
* [Hexagon] Adjust latency between allocframe and the first store on stackKrzysztof Parzyszek2017-05-031-0/+5
* [Hexagon] Handle J2_jumptpt and J2_jumpfpt in HexagonInstrInfoKrzysztof Parzyszek2017-05-031-8/+25
* [Hexagon] Implement undoing .cur instructions in packetizerKrzysztof Parzyszek2017-05-031-0/+22
* [Hexagon] Add memory operands to a rewritten loadKrzysztof Parzyszek2017-05-031-2/+3
* [Hexagon] Reset spill alignment when variable-sized objects are presentKrzysztof Parzyszek2017-05-031-0/+30
* [Hexagon] Don't ignore mult-cycle latency informationKrzysztof Parzyszek2017-05-021-8/+4
* [Hexagon] Remove unused validSubtarget TSFlagsKrzysztof Parzyszek2017-05-021-5/+0
* [Hexagon] Pick a dot-old instruction that matches the architectureKrzysztof Parzyszek2017-03-061-2/+23
* Make TargetInstrInfo::isPredicable take a const reference, NFCKrzysztof Parzyszek2017-03-031-1/+1
* [Hexagon] Pick the right branch opcode depending on branch probabilitiesKrzysztof Parzyszek2017-03-021-15/+69
* [Hexagon] Start using regmasks on callsKrzysztof Parzyszek2017-02-171-4/+16
* Revert "[Hexagon] Start using regmasks on calls"Rafael Espindola2017-02-171-16/+4
* [Hexagon] Start using regmasks on callsKrzysztof Parzyszek2017-02-161-4/+16
* [Hexagon] Remove leftover debugging codeKrzysztof Parzyszek2017-02-141-4/+0
* [Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek2017-02-101-1/+3
* [Hexagon] Fix insertBranch for loops with multiple ENDLOOP instructionsKrzysztof Parzyszek2017-02-021-18/+24
* [Hexagon] Rename TypeCOMPOUND to TypeCJKrzysztof Parzyszek2017-02-021-1/+1
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-26/+24
* [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use wa...Eugene Zelenko2017-01-041-156/+25
* Fix spelling mistakes in Hexagon target comments. NFC.Simon Pilgrim2016-11-171-2/+2
* [Hexagon] Remove unsafe load instructions that affect Stack Slot ColoringSumanth Gundapaneni2016-11-141-12/+0
* [Hexagon] Separate Hexagon subreg indices for different register classesKrzysztof Parzyszek2016-11-091-36/+40
* [Hexagon] Eliminate Insert4 pseudo-instruction, use combines insteadKrzysztof Parzyszek2016-11-091-42/+0
* MachineInstrBundle: Pass iterators to getBundle(Start|End); NFCMatthias Braun2016-10-251-1/+1
* Use StringRef instead of raw pointers in MCAsmInfo/MCInstrInfo APIs (NFC)Mehdi Amini2016-10-011-2/+2
* Finish renaming remaining analyzeBranch functionsMatt Arsenault2016-09-141-5/+5
* Make analyzeBranch family of instruction names consistentMatt Arsenault2016-09-141-3/+3
* AArch64: Use TTI branch functions in branch relaxationMatt Arsenault2016-09-141-2/+7
* CodeGen: Give MachineBasicBlock::reverse_iterator a handle to the current MIDuncan P. N. Exon Smith2016-09-111-1/+1
* Make sure to maintain register liveness when generating predicated instructions.Ron Lieberman2016-09-021-22/+56
* [Hexagon] Fix subesthetic indentationKrzysztof Parzyszek2016-08-191-3/+3
* [Hexagon] Fix a few omissions in HexagonInstrInfoKrzysztof Parzyszek2016-08-191-0/+3
* [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumprKrzysztof Parzyszek2016-08-191-0/+19
* Hexagon: Avoid dereferencing end() in HexagonInstrInfo::InsertBranchDuncan P. N. Exon Smith2016-08-171-7/+5
* [Hexagon] Standardize next batch of pseudo instructionsKrzysztof Parzyszek2016-08-161-9/+10
* [Hexagon] Clean up some miscellaneous V60 intrinsics a bitKrzysztof Parzyszek2016-08-161-8/+10
* [Hexagon] Standardize vector predicate load/store pseudo instructionsKrzysztof Parzyszek2016-08-161-20/+12
* [Hexagon] Cleanup and standardize vector load/store pseudo instructionsKrzysztof Parzyszek2016-08-121-81/+68
* [Hexagon] Standardize pseudo-instructions for calls and returnsKrzysztof Parzyszek2016-08-121-11/+11
* [Hexagon] Treat non-returning indirect calls as scheduling boundariesKrzysztof Parzyszek2016-08-121-4/+3
OpenPOWER on IntegriCloud