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* [Hexagon] Adding sxth instruction.Colin LeMahieu2014-11-211-2/+2
| | | | llvm-svn: 222577
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-11/+11
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-5/+5
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition llvm-svn: 207508
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-3/+3
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Correct word hyphenationsAlp Toker2013-12-051-1/+1
| | | | | | | This patch tries to avoid unrelated changes other than fixing a few hyphen-related ambiguities and contractions in nearby lines. llvm-svn: 196471
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-1/+3
| | | | | | | | | | | | | | | | | Previously, the DAGISel function WalkChainUsers was spotting that it had entered already-selected territory by whether a node was a MachineNode (amongst other things). Since it's fairly common practice to insert MachineNodes during ISelLowering, this was not the correct check. Looking around, it seems that other nodes get their NodeId set to -1 upon selection, so this makes sure the same thing happens to all MachineNodes and uses that characteristic to determine whether we should stop looking for a loop during selection. This should fix PR15840. llvm-svn: 191165
* Access the TargetLoweringInfo from the TargetMachine object instead of ↵Bill Wendling2013-06-191-10/+10
| | | | | | caching it. The TLI may change between functions. No functionality change. llvm-svn: 184360
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+13
| | | | | | the internals of TargetMachine could change. llvm-svn: 183490
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-2/+2
| | | | | | | Caching it as a pointer allows us to reset it if the TargetMachine object changes. llvm-svn: 183361
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-24/+24
| | | | | | | Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. llvm-svn: 182703
* Make references to HexagonTargetMachine "const".Krzysztof Parzyszek2013-05-061-3/+3
| | | | llvm-svn: 181233
* Hexagon: Remove assembler mapped instruction definitions.Jyotsna Verma2013-04-231-0/+11
| | | | llvm-svn: 180133
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-191-6/+4
| | | | llvm-svn: 179901
* Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and ↵Jyotsna Verma2013-03-221-0/+40
| | | | | | word. llvm-svn: 177747
* Hexagon: Use absolute addressing mode loads/stores for global+offset Jyotsna Verma2013-02-131-8/+103
| | | | | | instead of redefining separate instructions for them. llvm-svn: 175086
* Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handleJyotsna Verma2013-02-051-1/+8
| | | | | | zext( set[ne,eq,gt,ugt] (...) ) type of dag patterns. llvm-svn: 174429
* Use multiclass for post-increment store instructions.Jyotsna Verma2013-01-291-2/+2
| | | | llvm-svn: 173816
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+2
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Define signed const-ext immediate operands and their predicates.Jyotsna Verma2012-11-281-0/+11
| | | | llvm-svn: 168810
* Revert 156634 upon request until code improvement changes are made.Brendon Cahoon2012-05-141-25/+6
| | | | llvm-svn: 156775
* Hexagon constant extender support.Brendon Cahoon2012-05-111-6/+25
| | | | | | Patch by Jyotsna Verma. llvm-svn: 156634
* Hexagon V5 FP Support.Sirish Pande2012-05-101-0/+24
| | | | llvm-svn: 156568
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-071-1/+1
| | | | | | | | | | | | | The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! llvm-svn: 156328
* Support for target dependent Hexagon VLIW packetizer.Sirish Pande2012-05-031-8/+8
| | | | | | This patch creates and optimizes packets as per Hexagon ISA rules. llvm-svn: 156109
* Extensions of Hexagon V4 instructions.Sirish Pande2012-05-031-3/+3
| | | | | | This adds new instructions for Hexagon V4 architecture. llvm-svn: 156071
* Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth2012-04-231-33/+5
| | | | | | | | | | | test suite failures. The failures occur at each stage, and only get worse, so I'm reverting all of them. Please resubmit these patches, one at a time, after verifying that the regression test suite passes. Never submit a patch without running the regression test suite. llvm-svn: 155372
* Hexagon V5 (floating point) support.Sirish Pande2012-04-231-5/+33
| | | | llvm-svn: 155367
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-201-3/+3
| | | | | | since they are equivalent. llvm-svn: 155188
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-181-33/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commits have had several major issues pointed out in review, and those issues are not being addressed in a timely fashion. Furthermore, this was all committed leading up to the v3.1 branch, and we don't need piles of code with outstanding issues in the branch. It is possible that not all of these commits were necessary to revert to get us back to a green state, but I'm going to let the Hexagon maintainer sort that out. They can recommit, in order, after addressing the feedback. Reverted commits, with some notes: Primary commit r154616: HexagonPacketizer - There are lots of review comments here. This is the primary reason for reverting. In particular, it introduced large amount of warnings due to a bad construct in tablegen. - Follow-up commits that should be folded back into this when reposting: - r154622: CMake fixes - r154660: Fix numerous build warnings in release builds. - Please don't resubmit this until the three commits above are included, and the issues in review addressed. Primary commit r154695: Pass to replace transfer/copy ... - Reverted to minimize merge conflicts. I'm not aware of specific issues with this patch. Primary commit r154703: New Value Jump. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154703: Remove iostream usage - r154758: Fix CMake builds - r154759: Fix build warnings in release builds - Please incorporate these fixes and and review feedback before resubmitting. Primary commit r154829: Hexagon V5 (floating point) support. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154841: Remove unused variable (fixing build warnings) There are also accompanying Clang commits that will be reverted for consistency. llvm-svn: 155047
* Hexagon V5 (Floating Point) Support.Sirish Pande2012-04-161-5/+33
| | | | llvm-svn: 154829
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Optimize redundant sign extends and negation of predicates.Sirish Pande2012-02-151-2/+2
| | | | llvm-svn: 150606
* Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher2012-02-151-2/+2
| | | | | | | | as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. llvm-svn: 150604
* Optimize redundant sign extends and negation of predicatesSirish Pande2012-02-151-2/+2
| | | | llvm-svn: 150601
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-2/+2
| | | | llvm-svn: 149961
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-2/+0
| | | | llvm-svn: 148578
* Hexagon: Remove unused variables.Benjamin Kramer2011-12-181-8/+0
| | | | llvm-svn: 146846
* Hexagon backend supportTony Linthicum2011-12-121-0/+1495
llvm-svn: 146412
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