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* Adds extern "C" ints to the .cpp files that use RegisterTarget, asOscar Fuentes2008-11-151-0/+8
| | | | | | | | | | | well as 2 files that use "Registrator"s. These are to be used by the MSVC builds, as the Win32 linker does not include libs that are otherwise unreferenced, even if global constructors in the lib have side-effects. Patch by Scott Graham! llvm-svn: 59378
* Unbreak the buildbot and back out (inadvertant) casting edits in CellSPUScott Michel2008-11-111-7/+7
| | | | | | backend. llvm-svn: 59018
* CellSPU: Fix bug 3606, as well as some ongoing work.Scott Michel2008-11-103-12/+58
| | | | llvm-svn: 59009
* CMake: corrected library target name for dependency: LLVMCellSPU ->Oscar Fuentes2008-11-081-1/+1
| | | | | | LLVMCellSPUCodeGen. llvm-svn: 58925
* CMake: Reflected changes on the CellSPU target build. May require aOscar Fuentes2008-11-082-2/+13
| | | | | | clean start. llvm-svn: 58924
* Fixed a pasto.Oscar Fuentes2008-11-081-1/+2
| | | | llvm-svn: 58923
* CellSPU: Bring SPU's assembly printer more in-line with current LLVM codeScott Michel2008-11-085-647/+627
| | | | | | structure. Assembly printer now outputs the correct section for strings. llvm-svn: 58921
* CellSPU: Fix prologue/epilogue emission when function contains calls butScott Michel2008-11-081-2/+2
| | | | | | theframe size is 0; the prologue and epilogue should be emitted in this case. llvm-svn: 58890
* CellSPU: Ensure that C strings are always put in the .rodata sectionScott Michel2008-11-071-0/+1
| | | | llvm-svn: 58839
* Teach CellSPU about ELF sections and new section emitter classes.Scott Michel2008-11-073-35/+46
| | | | | NB: This is likely to need more work. llvm-svn: 58832
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
* Use getTargetConstant instead of getConstant for nodes that should not be ↵Dan Gohman2008-11-051-8/+8
| | | | | | | | visited by isel and potentially forced into registers. llvm-svn: 58747
* Refactor various TargetAsmInfo subclasses' TargetMachine members awayDan Gohman2008-11-031-1/+2
| | | | | | adding a TargetMachine member to the base TargetAsmInfo class instead. llvm-svn: 58624
* Shift amounts should have the type given byDuncan Sands2008-10-301-5/+5
| | | | | | getShiftAmountTy (i32 in the case of CellSPU). llvm-svn: 58449
* Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stackScott Michel2008-10-302-114/+69
| | | | | | | | | so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU. N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is still unexorcised code. llvm-svn: 58415
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. llvm-svn: 58278
* Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman2008-10-182-0/+8
| | | | | | | | | | | | | | | | | | | | | | and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. llvm-svn: 57748
* Trim #includes.Dan Gohman2008-10-161-2/+0
| | | | llvm-svn: 57649
* mark some targets as experimental. Andrew, if you think that Alpha isChris Lattner2008-10-161-1/+1
| | | | | | | basically working, feel free to remove the tag. The other targets have really basic things that break them. llvm-svn: 57628
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-162-3/+3
| | | | llvm-svn: 57622
* Rename LoadX to LoadExt.Evan Cheng2008-10-141-9/+9
| | | | llvm-svn: 57526
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-1/+1
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-112-7/+6
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Use template to distinguish between function variants.Duncan Sands2008-10-081-5/+14
| | | | | | | | | | | | | | GCC 4.4.0 gives an error on the "int" declaration for example saying that it has already been declared (using the "short" one). Using templates here allow the compiler to distinguish between the function to choose. Also, "llvm/Support/DataTypes.h" was not included, leading to error messages about not knowing "uint32_t" for example. Patch by Samuel Tardieu. llvm-svn: 57292
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-033-33/+33
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-2/+1
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman2008-09-263-12/+12
| | | | | | | consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. llvm-svn: 56700
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-1/+2
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* CMake: Builds all targets.Oscar Fuentes2008-09-261-0/+25
| | | | llvm-svn: 56641
* If we have a function with an unreachable statement such that the ending debugBill Wendling2008-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | information is in an unreachable block, then it's possible that the high/low pc values won't be set for the dwarf information. E.g., this function: void abort(void) __attribute__((__noreturn__)); void dead_beef(void) __attribute__ ((noreturn)); int *b; void dead_beef(void) { *b=0xdeadbeef; abort(); } has a call to "@llvm.dbg.region.end" only in the unreachable block: define void @dead_beef() noreturn nounwind { entry: call void @llvm.dbg.func.start(...) call void @llvm.dbg.stoppoint(...) ... call void @abort( ) noreturn nounwind unreachable return: ; No predecessors! call void @llvm.dbg.stoppoint(...) call void @llvm.dbg.region.end(...) ret void } The dwarf information emitted is something like: 0x00000084: TAG_subprogram [5] AT_name( "dead_beef" ) AT_external( 0x01 ) AT_prototyped( 0x01 ) AT_decl_file( 0x01 ) AT_decl_line( 0x08 ) Note that this is *not* the best fix for this problem, but a band-aid for an gaping wound. This code needs to be changed when we revamp our debugging information. llvm-svn: 56628
* Get rid of now unused {Four,Eight,Sixteen}ByteConstantSectionAnton Korobeynikov2008-09-241-2/+0
| | | | llvm-svn: 56580
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-1/+1
| | | | llvm-svn: 56573
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-17/+1
| | | | llvm-svn: 56572
* SPU section handling is really huge mess. Replace remaining TAI calls for ↵Anton Korobeynikov2008-09-241-2/+2
| | | | | | sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday. llvm-svn: 56570
* Properly handle 'm' inline asm constraints. If a GV is being selected for ↵Evan Cheng2008-09-242-1/+4
| | | | | | the addressing mode, it requires the same logic for PIC relative addressing, etc. llvm-svn: 56526
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | instruction opcodes are now numbered. No functionality change. llvm-svn: 56497
* Make log, log2, log10, exp, exp2 use Expand byDale Johannesen2008-09-221-10/+0
| | | | | | default. llvm-svn: 56471
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-8/+7
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-7/+8
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-131-11/+12
| | | | | | | | | | | | | Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. llvm-svn: 56183
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-123-59/+69
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* Fix constant pool loads, and remove broken versions of addConstantPoolReference.Owen Anderson2008-09-061-12/+0
| | | | llvm-svn: 55868
* Clean up uses of TargetLowering::getTargetMachine.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55769
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+10
| | | | | | No functional change (and no FE change to generate them). llvm-svn: 55753
* fix a bunch of 80-col violationsGabor Greif2008-08-312-15/+33
| | | | llvm-svn: 55588
* Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTRBill Wendling2008-08-311-3/+7
| | | | | | | | instructions in CellSPU as "Expand" so that they won't be generated. I added a "FIXME" so that this hack can be addressed and reverted once ISD::ROTR is supported in the .td files. llvm-svn: 55582
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-283-61/+61
| | | | | | Node to reflect semantics llvm-svn: 55504
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-1/+1
| | | | llvm-svn: 55394
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-262-4/+6
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-5/+4
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
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