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path: root/llvm/lib/Target/CellSPU/SPUISelLowering.h
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* Properly handle 'm' inline asm constraints. If a GV is being selected for ↵Evan Cheng2008-09-241-0/+1
| | | | | | the addressing mode, it requires the same logic for PIC relative addressing, etc. llvm-svn: 56526
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | instruction opcodes are now numbered. No functionality change. llvm-svn: 56497
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-13/+13
| | | | llvm-svn: 54128
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-7/+7
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Add necessary 64-bit support so that gcc frontend compiles (mostly). CurrentScott Michel2008-06-021-1/+6
| | | | | | | issue is operand promotion for setcc/select... but looks like the fundamental stuff is implemented for CellSPU. llvm-svn: 51884
* Bug fixes and updates for CellSPU, syncing up with trunk. Most notableScott Michel2008-04-301-0/+4
| | | | | | | | fixes are target-specific lowering of frame indices, fix constants generated for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor- TargetNode(). llvm-svn: 50462
* no need to implement this method and just have it callChris Lattner2008-04-261-4/+0
| | | | | | the default impl. llvm-svn: 50311
* Integer comparison tests for CellSPU.Scott Michel2008-03-101-1/+1
| | | | llvm-svn: 48152
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-101-0/+3
| | | | | | | | return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. llvm-svn: 48145
* Merge current work back to tree to minimize diffs and drift. Major highlightsScott Michel2008-02-231-1/+4
| | | | | | | | | | | | | | for CellSPU modifications: - SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend. - Other improvements based on refactoring effort in SPUISelLowering.cpp, esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and rotates are now eliminiated, other scalar-to-vector-to-scalar silliness is also eliminated. - 64-bit operations are being implemented, _muldi3.c gcc runtime now compiles and generates the right code. More work still needs to be done. llvm-svn: 47532
* Fix single precision FP constants on SPU. They are actually legal,Nate Begeman2008-02-141-1/+0
| | | | | | which allows us to kill a target-specific node. llvm-svn: 47127
* Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBitsDan Gohman2008-02-131-1/+1
| | | | | | to pass the mask APInt by value, not by reference. llvm-svn: 47096
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-131-3/+3
| | | | | | | Add an overload that supports the uint64_t interface for use by clients that haven't been updated yet. llvm-svn: 47039
* Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a ↵Evan Cheng2008-01-301-3/+0
| | | | | | | | proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert instruction at the end. llvm-svn: 46562
* More cleanups for CellSPU:Scott Michel2008-01-301-20/+20
| | | | | | | | | - Expand tabs... (poss 80-col violations, will get them later...) - Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single function, simplifying maintenance. Also reduced custom instruction generation for SPUvecinsert/INSERT_MASK. llvm-svn: 46544
* Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel2008-01-291-2/+1
| | | | | | | | | | | | | | only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. llvm-svn: 46483
* More CellSPU refinement and progress:Scott Michel2008-01-111-1/+2
| | | | | | | | | | | | | | | | | | | | - Cleaned up custom load/store logic, common code is now shared [see note below], cleaned up address modes - More test cases: various intrinsics, structure element access (load/store test), updated target data strings, indirect function calls. Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode structures: they now share a common base class, LSBaseSDNode, that provides an interface to their common functionality. There is some hackery to access the proper operand depending on the derived class; otherwise, to do a proper job would require finding and rearranging the SDOperands sent to StoreSDNode's constructor. The current refactor errs on the side of being conservatively and backwardly compatible while providing functionality that reduces redundant code for targets where loads and stores are custom-lowered. llvm-svn: 45851
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-3/+2
| | | | llvm-svn: 45418
* Updated source file headers to llvm coding standard.Scott Michel2007-12-051-3/+2
| | | | llvm-svn: 44597
* More of the Cell SPU code drop from "Team Aerospace".Scott Michel2007-12-041-0/+139
llvm-svn: 44582
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