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* Remove the Blackfin backend.Dan Gohman2011-10-2537-4415/+0
| | | | llvm-svn: 142880
* Use a SmallVector for intrinsic argument types.Benjamin Kramer2011-10-171-1/+1
| | | | llvm-svn: 142259
* Build system infrastructure for multiple tblgens.Peter Collingbourne2011-10-061-7/+7
| | | | llvm-svn: 141266
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-062-2/+3
| | | | | | | | | | | | with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. llvm-svn: 139159
* Fix typo in BlackfinFrameLowering.hJames Molloy2011-08-301-2/+2
| | | | | | Patch supplied by Liu (projlc@gmail.com) llvm-svn: 138798
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-246-6/+6
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* Some refactoring so TargetRegistry.h no longer has to include any filesEvan Cheng2011-08-231-0/+1
| | | | | | from MC. llvm-svn: 138367
* Actually finish switching to the new system for Target sublibraryChandler Carruth2011-08-011-1/+1
| | | | | | | | | | | TableGen deps introduced in r136023. This completes the fixing that dgregor started in r136621. Sorry for missing these the first time around. This should fix some of the random race-condition failures people are still seeing with CMake. llvm-svn: 136643
* Rewrite the CMake build to use explicit dependencies between libraries,Chandler Carruth2011-07-293-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified in the same file that the library itself is created. This is more idiomatic for CMake builds, and also allows us to correctly specify dependencies that are missed due to bugs in the GenLibDeps perl script, or change from compiler to compiler. On Linux, this returns CMake to a place where it can relably rebuild several targets of LLVM. I have tried not to change the dependencies from the ones in the current auto-generated file. The only places I've really diverged are in places where I was seeing link failures, and added a dependency. The goal of this patch is not to start changing the dependencies, merely to move them into the correct location, and an explicit form that we can control and change when necessary. This also removes a serialization point in the build because we don't have to scan all the libraries before we begin building various tools. We no longer have a step of the build that regenerates a file inside the source tree. A few other associated cleanups fall out of this. This isn't really finished yet though. After talking to dgregor he urged switching to a single CMake macro to construct libraries with both sources and dependencies in the arguments. Migrating from the two macros to that style will be a follow-up patch. Also, llvm-config is still generated with GenLibDeps.pl, which means it still has slightly buggy dependencies. The internal CMake 'llvm-config-like' macro uses the correct explicitly specified dependencies however. A future patch will switch llvm-config generation (when using CMake) to be based on these deps as well. This may well break Windows. I'm getting a machine set up now to dig into any failures there. If anyone can chime in with problems they see or ideas of how to solve them for Windows, much appreciated. llvm-svn: 136433
* Code generation for 'fence' instruction.Eli Friedman2011-07-271-0/+1
| | | | llvm-svn: 136283
* Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth2011-07-262-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. llvm-svn: 136023
* createXXXMCCodeGenInfo should be static.Evan Cheng2011-07-231-2/+2
| | | | llvm-svn: 135826
* Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,Evan Cheng2011-07-221-20/+18
| | | | | | InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. llvm-svn: 135812
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-203-5/+9
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-193-6/+17
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
| | | | | | better location welcome). llvm-svn: 135438
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-183-20/+11
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-182-6/+6
| | | | llvm-svn: 135375
* Major update to CMake build to reflect changes in r135219 in theChandler Carruth2011-07-151-1/+0
| | | | | | | | | | | | backend. Moved some MCAsmInfo files down into the MCTargetDesc sublibraries, removed some (i suspect long) dead files from other parts of the CMake build, etc. Also copied the include directory hack from the Makefile. Finally, updated the lib deps. I spot checked this, and think its correct, but review appreciated there. llvm-svn: 135234
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-145-7/+13
| | | | | | MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-1410-38/+112
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Second attempt at de-constifying LLVM Types in FunctionType::get(),Jay Foad2011-07-121-1/+1
| | | | | | StructType::get() and TargetData::getIntPtrType(). llvm-svn: 134982
* Revert r134893 and r134888 (and related patches in other trees). It was causingBill Wendling2011-07-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | an assert on Darwin llvm-gcc builds. Assertion failed: (castIsValid(op, S, Ty) && "Invalid cast!"), function Create, file /Users/buildslave/zorg/buildbot/smooshlab/slave-0.8/build.llvm-gcc-i386-darwin9-RA/llvm.src/lib/VMCore/Instructions.cpp, li\ ne 2067. etc. http://smooshlab.apple.com:8013/builders/llvm-gcc-i386-darwin9-RA/builds/2354 --- Reverse-merging r134893 into '.': U include/llvm/Target/TargetData.h U include/llvm/DerivedTypes.h U tools/bugpoint/ExtractFunction.cpp U unittests/Support/TypeBuilderTest.cpp U lib/Target/ARM/ARMGlobalMerge.cpp U lib/Target/TargetData.cpp U lib/VMCore/Constants.cpp U lib/VMCore/Type.cpp U lib/VMCore/Core.cpp U lib/Transforms/Utils/CodeExtractor.cpp U lib/Transforms/Instrumentation/ProfilingUtils.cpp U lib/Transforms/IPO/DeadArgumentElimination.cpp U lib/CodeGen/SjLjEHPrepare.cpp --- Reverse-merging r134888 into '.': G include/llvm/DerivedTypes.h U include/llvm/Support/TypeBuilder.h U include/llvm/Intrinsics.h U unittests/Analysis/ScalarEvolutionTest.cpp U unittests/ExecutionEngine/JIT/JITTest.cpp U unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp U unittests/VMCore/PassManagerTest.cpp G unittests/Support/TypeBuilderTest.cpp U lib/Target/MBlaze/MBlazeIntrinsicInfo.cpp U lib/Target/Blackfin/BlackfinIntrinsicInfo.cpp U lib/VMCore/IRBuilder.cpp G lib/VMCore/Type.cpp U lib/VMCore/Function.cpp G lib/VMCore/Core.cpp U lib/VMCore/Module.cpp U lib/AsmParser/LLParser.cpp U lib/Transforms/Utils/CloneFunction.cpp G lib/Transforms/Utils/CodeExtractor.cpp U lib/Transforms/Utils/InlineFunction.cpp U lib/Transforms/Instrumentation/GCOVProfiling.cpp U lib/Transforms/Scalar/ObjCARC.cpp U lib/Transforms/Scalar/SimplifyLibCalls.cpp U lib/Transforms/Scalar/MemCpyOptimizer.cpp G lib/Transforms/IPO/DeadArgumentElimination.cpp U lib/Transforms/IPO/ArgumentPromotion.cpp U lib/Transforms/InstCombine/InstCombineCompares.cpp U lib/Transforms/InstCombine/InstCombineAndOrXor.cpp U lib/Transforms/InstCombine/InstCombineCalls.cpp U lib/CodeGen/DwarfEHPrepare.cpp U lib/CodeGen/IntrinsicLowering.cpp U lib/Bitcode/Reader/BitcodeReader.cpp llvm-svn: 134949
* De-constify Types in FunctionType::get().Jay Foad2011-07-111-1/+1
| | | | llvm-svn: 134888
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-112-3/+15
| | | | | | | | | | | | and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
* Change createAsmParser to take a MCSubtargetInfo instead of triple,Evan Cheng2011-07-091-0/+14
| | | | | | | | | CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. llvm-svn: 134795
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-082-2/+3
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-072-4/+4
| | | | llvm-svn: 134606
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-014-4/+4
| | | | llvm-svn: 134281
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-012-3/+3
| | | | llvm-svn: 134259
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-012-2/+9
| | | | | | | | | itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-012-3/+6
| | | | llvm-svn: 134244
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-304-6/+11
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Move the Blackfin port away from getRegClassForInlineAsmConstraint byEric Christopher2011-06-293-29/+22
| | | | | | | | creating a few specific register classes. Part of rdar://9643582 llvm-svn: 134086
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-282-4/+3
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-284-5/+7
| | | | llvm-svn: 134024
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-6/+6
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng2011-06-271-2/+2
| | | | llvm-svn: 133944
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-275-9/+10
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-243-8/+10
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Delete unneeded allocation order override.Jakob Stoklund Olesen2011-06-181-11/+1
| | | | llvm-svn: 133331
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-58/+29
| | | | | | | | | | | | This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. llvm-svn: 133105
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-66/+3
| | | | | | | | | | | | | | | | | | | | The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-8/+8
| | | | | | | | No functional change. Part of PR6965 llvm-svn: 132763
* Blackfin always uses a reserved call frame.Jakob Stoklund Olesen2011-06-033-2/+7
| | | | | | | Materializing the stack pointer update before a call requires a scratch register that may not be available. llvm-svn: 132601
* Use TRI::has{Sub,Super}ClassEq() where possible.Jakob Stoklund Olesen2011-06-022-3/+3
| | | | | | No functional change. llvm-svn: 132455
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+7
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Make the logic for determining function alignment more explicit. No ↵Eli Friedman2011-05-062-6/+2
| | | | | | functionality change. llvm-svn: 131012
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
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