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llvm-svn: 86332
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llvm-svn: 86114
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won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364.
PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
llvm-svn: 85766
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
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llvm-svn: 84194
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a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
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verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
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and after printing an instruction.
llvm-svn: 83363
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This will allow processDebugLoc() to handle scopes for DWARF debug info.
llvm-svn: 83183
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naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
llvm-svn: 82790
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llvm-svn: 82656
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default implementation. Update comment on the default version, which made it
sound like most targets override it. Currently only X86 and SystemZ override
this method.
llvm-svn: 82651
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llvm-svn: 82355
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llvm-svn: 81718
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llvm-svn: 81714
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the object, make it static instead of const.
llvm-svn: 81711
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Nothing is using this info yet.
llvm-svn: 81707
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now that printBasicBlockLabel is only used for starting
a MBB. This allows elimination of a bunch of arguments.
llvm-svn: 81684
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instead.
llvm-svn: 81677
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the MCInst path of the asmprinter. Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter. This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.
This also fixes an xcore strangeness where it inserted two tabs
before every instruction.
llvm-svn: 81396
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llvm-svn: 80773
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llvm-svn: 80584
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llvm-svn: 79833
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llvm-svn: 79780
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llvm-svn: 79777
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llvm-svn: 79763
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llvm-svn: 79742
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talk to the MCStreamer directly instead.
llvm-svn: 79405
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- Drop the Candidates argument and fix all callers. Now that RegScavenger
tracks available registers accurately, there is no need to restict the
search.
- Make sure that no aliases of the found register are in use. This was a potential bug.
llvm-svn: 79369
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pair instead of from a virtual method on TargetMachine. This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use
TargetAsmInfo.
llvm-svn: 78802
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MathExtras.h
llvm-svn: 78793
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"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character. This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character. This also allows hoisting the darwin stuff up to the
shared TAI class.
llvm-svn: 78737
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while
the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
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LLVMTargetMachine ctor. It is currently unused.
llvm-svn: 78711
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own struct type.
llvm-svn: 78610
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SimpleValueType, which will simplify the privatization of IntegerType in the future.
llvm-svn: 78584
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llvm-svn: 78506
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error condition get trapped with an assert.
llvm-svn: 78449
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Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
llvm-svn: 78142
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llvm-svn: 78105
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The only exception is CC.
llvm-svn: 78089
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llvm-svn: 78020
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Thanks Chris.
llvm-svn: 77987
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- The C, C++, MSIL, and Mips backends still need the module.
llvm-svn: 77927
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
llvm-svn: 77918
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__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end.
__builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load.
We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds.
llvm-svn: 77917
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llvm-svn: 77903
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This is just the framework to identify the needed workarounds. They are not actually implemented.
llvm-svn: 77902
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We use the same constraints as GCC, including those that are slightly insane for inline assembler.
llvm-svn: 77899
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Generate code for the Blackfin family of DSPs from Analog Devices:
http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
We aim to be compatible with the exsisting GNU toolchain found at:
http://blackfin.uclinux.org/gf/project/toolchain
The back-end is experimental.
llvm-svn: 77897
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