Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Remove the Alpha backend. | Dan Gohman | 2011-10-27 | 1 | -85/+0 |
| | | | | llvm-svn: 143164 | ||||
* | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 1 | -1/+4 |
| | | | | llvm-svn: 134244 | ||||
* | Remove the isMoveInstr() hook. | Jakob Stoklund Olesen | 2010-07-16 | 1 | -6/+0 |
| | | | | llvm-svn: 108567 | ||||
* | RISC architectures get their memory operand folding for free. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -12/+0 |
| | | | | | | | | The only folding these load/store architectures can do is converting COPY into a load or store, and the target independent part of foldMemoryOperand already knows how to do that. llvm-svn: 108099 | ||||
* | Replace copyRegToReg with copyPhysReg for Alpha. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -6/+4 |
| | | | | llvm-svn: 108065 | ||||
* | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings | 2010-06-17 | 1 | -2/+3 |
| | | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243 | ||||
* | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 2010-05-06 | 1 | -1/+2 |
| | | | | | | doesn't have to guess. llvm-svn: 103194 | ||||
* | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 1 | -2/+4 |
| | | | | llvm-svn: 103193 | ||||
* | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 2009-12-05 | 1 | -1/+0 |
| | | | | | | | MachineBasicBlock::canFallThrough(), which is target-independent and more thorough. llvm-svn: 90634 | ||||
* | Remove unused member functions. | Eli Friedman | 2009-07-24 | 1 | -10/+0 |
| | | | | llvm-svn: 76960 | ||||
* | Convert Alpha and Mips to use a MachineFunctionInfo subclass to | Dan Gohman | 2009-06-03 | 1 | -0/+12 |
| | | | | | | | | | | carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This eliminates the need for them to search through the MachineRegisterInfo livein list in order to identify these virtual registers. EmitLiveInCopies is now the only user of the virtual register portion of MachineRegisterInfo's livein data. llvm-svn: 72802 | ||||
* | Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty | Evan Cheng | 2009-02-09 | 1 | -1/+2 |
| | | | | | | | | suprise to some callers, e.g. register coalescer. For now, add an parameter that tells AnalyzeBranch whether it's safe to modify the mbb. A better solution is out there, but I don't have time to deal with it right now. llvm-svn: 64124 | ||||
* | Change TargetInstrInfo::isMoveInstr to return source and destination ↵ | Evan Cheng | 2009-01-20 | 1 | -4/+4 |
| | | | | | | sub-register indices as well. llvm-svn: 62600 | ||||
* | Split foldMemoryOperand into public non-virtual and protected virtual | Dan Gohman | 2008-12-03 | 1 | -8/+8 |
| | | | | | | | parts, and add target-independent code to add/preserve MachineMemOperands. llvm-svn: 60488 | ||||
* | Add more const qualifiers. This fixes build breakage from r59540. | Dan Gohman | 2008-11-18 | 1 | -2/+4 |
| | | | | llvm-svn: 59542 | ||||
* | Const-ify several TargetInstrInfo methods. | Dan Gohman | 2008-10-16 | 1 | -3/+3 |
| | | | | llvm-svn: 57622 | ||||
* | Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵ | Owen Anderson | 2008-08-26 | 1 | -1/+1 |
| | | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375 | ||||
* | Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵ | Owen Anderson | 2008-08-14 | 1 | -3/+3 |
| | | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802 | ||||
* | Change target-specific classes to use more precise static types. | Dan Gohman | 2008-05-14 | 1 | -1/+1 |
| | | | | | | | This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. llvm-svn: 51091 | ||||
* | Rename MRegisterInfo to TargetRegisterInfo. | Dan Gohman | 2008-02-10 | 1 | -1/+1 |
| | | | | llvm-svn: 46930 | ||||
* | It's not always safe to fold movsd into xorpd, etc. Check the alignment of ↵ | Evan Cheng | 2008-02-08 | 1 | -2/+4 |
| | | | | | | the load address first to make sure it's 16 byte aligned. llvm-svn: 46893 | ||||
* | Move even more functionality from MRegisterInfo into TargetInstrInfo. | Owen Anderson | 2008-01-07 | 1 | -0/+11 |
| | | | | | | Some day I'll get it all moved over... llvm-svn: 45672 | ||||
* | Move some more instruction creation methods from RegisterInfo into InstrInfo. | Owen Anderson | 2008-01-01 | 1 | -0/+19 |
| | | | | llvm-svn: 45484 | ||||
* | Fix a problem where lib/Target/TargetInstrInfo.h would include and use | Chris Lattner | 2008-01-01 | 1 | -1/+1 |
| | | | | | | | | | | a header file from libcodegen. This violates a layering order: codegen depends on target, not the other way around. The fix to this is to split TII into two classes, TII and TargetInstrInfoImpl, which defines stuff that depends on libcodegen. It is defined in libcodegen, where the base is not. llvm-svn: 45475 | ||||
* | Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the | Owen Anderson | 2007-12-31 | 1 | -0/+5 |
| | | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470 | ||||
* | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| | | | | llvm-svn: 45418 | ||||
* | RemoveBranch() and InsertBranch() now returns number of instructions deleted ↵ | Evan Cheng | 2007-05-18 | 1 | -2/+2 |
| | | | | | | / inserted. llvm-svn: 37192 | ||||
* | Add all that branch mangling niftiness | Andrew Lenharth | 2006-10-31 | 1 | -0/+8 |
| | | | | llvm-svn: 31313 | ||||
* | implement uncond branch insertion so alpha works work branchfolding. | Chris Lattner | 2006-10-24 | 1 | -0/+4 |
| | | | | llvm-svn: 31158 | ||||
* | isStoreToStackSlot | Andrew Lenharth | 2006-02-03 | 1 | -0/+1 |
| | | | | llvm-svn: 25925 | ||||
* | Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ↵ | Chris Lattner | 2006-02-02 | 1 | -0/+2 |
| | | | | | | more logical place. Other methods should also be moved if anyoneis interested. :) llvm-svn: 25913 | ||||
* | Remove trailing whitespace | Misha Brukman | 2005-04-21 | 1 | -2/+2 |
| | | | | llvm-svn: 21424 | ||||
* | Make file header comment consistent: extend the whole 80 cols to fill the line | Misha Brukman | 2005-02-04 | 1 | -1/+1 |
| | | | | llvm-svn: 20039 | ||||
* | Let me introduce you to the early stages of the llvm backend for the alpha ↵ | Andrew Lenharth | 2005-01-22 | 1 | -0/+42 |
processor llvm-svn: 19764 |