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* [AVR] Implement getCmpLibcallReturnType().Dylan McKay2017-09-241-0/+5
| | | | | | | | | This fixes the avr-rust issue (#75) with floating-point comparisons generating broken code. By default, LLVM assumes these comparisons return 32-bit values, but ours are 8-bit. Patch By Thomas Backman. llvm-svn: 314070
* [AVR] Remove the 'IsN64' argument to 'MCELFObjectWriter'Dylan McKay2017-09-221-1/+1
| | | | | | This has since been removed. llvm-svn: 313965
* [AVR] Enable the '__do_copy_data' functionDylan McKay2017-09-112-0/+22
| | | | | | | | | | | | | Also enables '__do_clear_bss'. These functions are automaticalled called by the CRT if they are declared. We need these to be called otherwise RAM will start completely uninitialised, even though we need to copy RAM variables from progmem to RAM. llvm-svn: 312905
* [AVR] Use the correct register classes for 16-bit atomic operationsDylan McKay2017-08-241-22/+42
| | | | llvm-svn: 311620
* Add "Restored" flag to CalleeSavedInfoKrzysztof Parzyszek2017-08-102-2/+2
| | | | | | | | | | | The liveness-tracking code assumes that the registers that were saved in the function's prolog are live outside of the function. Specifically, that registers that were saved are also live-on-exit from the function. This isn't always the case as illustrated by the LR register on ARM. Differential Revision: https://reviews.llvm.org/D36160 llvm-svn: 310619
* [AVR] Compute code model if one is not providedMeador Inge2017-08-061-6/+10
| | | | | | | | | | | | | | The patch from r310028 fixed things to work with the new `LLVMTargetMachine` constructor that came in on r309911. However, the fix was partial since an object of type `CodeModel::Model` must be passed to `LLVMTargetMachine` (not one of `Optional<CodeModel::Model>`). This patch fixes the problem in the same fashion that r309911 did for other machines: by checking if the passed optional code model has a value and using `CodeModel::Small` if not. llvm-svn: 310200
* [AVR] Update target machine to use new constructor parametersDylan McKay2017-08-042-5/+10
| | | | | | The required parameters were changed in r309911. llvm-svn: 310028
* [AVR] Remove the instrumentation passDylan McKay2017-07-234-226/+0
| | | | | | | | I have a much better way of running integration tests now. https://github.com/dylanmckay/avr-test-suite llvm-svn: 308857
* [SystemZ, LoopStrengthReduce]Jonas Paulsson2017-07-212-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes LSR generate better code for SystemZ in the cases of memory intrinsics, Load->Store pairs or comparison of immediate with memory. In order to achieve this, the following common code changes were made: * New TTI hook: LSRWithInstrQueries(), which defaults to false. Controls if LSR should do instruction-based addressing evaluations by calling isLegalAddressingMode() with the Instruction pointers. * In LoopStrengthReduce: handle address operands of memset, memmove and memcpy as address uses, and call isFoldableMemAccessOffset() for any LSRUse::Address, not just loads or stores. SystemZ changes: * isLSRCostLess() implemented with Insns first, and without ImmCost. * New function supportedAddressingMode() that is a helper for TTI methods looking at Instructions passed via pointers. Review: Ulrich Weigand, Quentin Colombet https://reviews.llvm.org/D35262 https://reviews.llvm.org/D35049 llvm-svn: 308729
* [AVR] Fix broken indentationDylan McKay2017-07-131-1/+1
| | | | llvm-svn: 307891
* [AVR] Add a 'LLVM_FALLTHROUGH' statement to the AsmParserDylan McKay2017-07-131-0/+1
| | | | | | Should fix warnings in the build. llvm-svn: 307890
* [AVR] Fix indirect calls to function pointersDylan McKay2017-07-131-2/+14
| | | | | | Patch by Carl Peto. llvm-svn: 307888
* [AVR] Remove a few very old TODOs that don't have enough context to understandDylan McKay2017-07-112-3/+4
| | | | llvm-svn: 307622
* [AVR] Rename 'ZREGS' to 'ZREG'Dylan McKay2017-07-113-16/+13
| | | | | | It will only ever contain one register. llvm-svn: 307620
* [AVR] Rename 'AVRTiny' to 'Tiny'Dylan McKay2017-07-112-13/+12
| | | | llvm-svn: 307619
* [AVR] Use the generic branch relaxerDylan McKay2017-07-113-5/+77
| | | | llvm-svn: 307617
* Revert "[AVR] Add the branch selection pass from the GitHub repository"Dylan McKay2017-07-053-269/+0
| | | | | | This reverts commit 602ef067c1d58ecb425d061f35f2bc4c7e92f4f3. llvm-svn: 307111
* [AVR] Add the branch selection pass from the GitHub repositoryDylan McKay2017-07-053-0/+269
| | | | | | | We should rewrite this using the generic branch relaxation pass, but for the moment having this pass is better than hitting an assertion error. llvm-svn: 307109
* [AVR] Fix bug which caused assertion errors for some FRMIDX instructionsDylan McKay2017-07-041-3/+8
| | | | | | | | | | | | | Previously, if a basic block ended with a FRMIDX instruction, we would end up doing something like this. *std::next(MBB.end()) Which would hit an error: "Assertion `!NodePtr->isKnownSentinel()' failed." llvm-svn: 307057
* [AVR] Add a missing clobber declaration to LPMWDylan McKay2017-07-041-6/+6
| | | | llvm-svn: 307056
* [AVR] Update AVRASmBackend from API change in r306906Dylan McKay2017-07-012-7/+7
| | | | llvm-svn: 306923
* [AVR] Migrate to new MCAsmBackend applyFixup and processFixupValueLeslie Zhai2017-06-272-28/+26
| | | | | | | | | | | | Reviewers: rafael, dylanmckay, jroelofs, meadori Reviewed By: rafael, meadori Subscribers: meadori, llvm-commits Differential Revision: https://reviews.llvm.org/D34551 llvm-svn: 306359
* Fix -Wunused-variable.Rui Ueyama2017-06-091-2/+0
| | | | llvm-svn: 305051
* Move Object format code to lib/BinaryFormat.Zachary Turner2017-06-073-3/+3
| | | | | | | | | | | | This creates a new library called BinaryFormat that has all of the headers from llvm/Support containing structure and layout definitions for various types of binary formats like dwarf, coff, elf, etc as well as the code for identifying a file from its magic. Differential Revision: https://reviews.llvm.org/D33843 llvm-svn: 304864
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-068-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | | I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
* TargetMachine: Indicate whether machine verifier passes.Matthias Braun2017-05-311-0/+4
| | | | | | | | | | | | | This adds a callback to the LLVMTargetMachine that lets target indicate that they do not pass the machine verifier checks in all cases yet. This is intended to be a temporary measure while the targets are fixed allowing us to enable the machine verifier by default with EXPENSIVE_CHECKS enabled! Differential Revision: https://reviews.llvm.org/D33696 llvm-svn: 304320
* [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-2/+2
| | | | | | | When generating code for a shift loop, check the shift amount against the literal value 0, not R0 llvm-svn: 304284
* [AVR] CPIRdK can only work with r16..r31; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-1/+1
| | | | | | (https://github.com/avr-rust/rust/issues/50) llvm-svn: 304283
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-301-2/+2
| | | | | | | | | | | TargetPassConfig is not useful for targets that do not use the CodeGen library, so we may just as well store a pointer to an LLVMTargetMachine instead of just to a TargetMachine. While at it, also change the constructor to take a reference instead of a pointer as the TM must not be nullptr. llvm-svn: 304247
* [AVR] Remove SREG from CPI's Uses; authored by Florian ZeitzDylan McKay2017-05-291-1/+0
| | | | | | | | | | | | | | Summary: CPI does not read the status register, but only writes it. Reviewers: dylanmckay Reviewed By: dylanmckay Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33223 llvm-svn: 304116
* [AVR] When lowering Select8/Select16, put newly generated MBBs in the same spotDylan McKay2017-05-131-2/+3
| | | | | | | | | | Contributed by Dr. Gergő Érdi. Fixes a bug. Raised from (https://github.com/avr-rust/rust/issues/49). llvm-svn: 302973
* [AVR] Remove an unused variableDylan McKay2017-05-131-1/+0
| | | | llvm-svn: 302970
* [AVR] Migrate to new StructType::get owing to Supress all uses of ↵Leslie Zhai2017-05-121-1/+1
| | | | | | | | | | | | LLVM_END_WITH_NULL Reviewers: dylanmckay, jroelofs, RKSimon, serge-sans-paille Reviewed By: serge-sans-paille Differential Revision: https://reviews.llvm.org/D33119 llvm-svn: 302885
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-093-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using arguments with attribute inalloca creates problems for verification of machine representation. This attribute instructs the backend that the argument is prepared in stack prior to CALLSEQ_START..CALLSEQ_END sequence (see http://llvm.org/docs/InAlloca.htm for details). Frame size stored in CALLSEQ_START in this case does not count the size of this argument. However CALLSEQ_END still keeps total frame size, as caller can be responsible for cleanup of entire frame. So CALLSEQ_START and CALLSEQ_END keep different frame size and the difference is treated by MachineVerifier as stack error. Currently there is no way to distinguish this case from actual errors. This patch adds additional argument to CALLSEQ_START and its target-specific counterparts to keep size of stack that is set up prior to the call frame sequence. This argument allows MachineVerifier to calculate actual frame size associated with frame setup instruction and correctly process the case of inalloca arguments. The changes made by the patch are: - Frame setup instructions get the second mandatory argument. It affects all targets that use frame pseudo instructions and touched many files although the changes are uniform. - Access to frame properties are implemented using special instructions rather than calls getOperand(N).getImm(). For X86 and ARM such replacement was made previously. - Changes that reflect appearance of additional argument of frame setup instruction. These involve proper instruction initialization and methods that access instruction arguments. - MachineVerifier retrieves frame size using method, which reports sum of frame parts initialized inside frame instruction pair and outside it. The patch implements approach proposed by Quentin Colombet in https://bugs.llvm.org/show_bug.cgi?id=27481#c1. It fixes 9 tests failed with machine verifier enabled and listed in PR27481. Differential Revision: https://reviews.llvm.org/D32394 llvm-svn: 302527
* [AVR] Reserve the Y register in all functionsDylan McKay2017-05-031-6/+12
| | | | llvm-svn: 302017
* Revert "[AVR] Enable the frame pointer for all functions"Dylan McKay2017-05-031-3/+2
| | | | | | This reverts commit 358ad02d999e88853d2cfc954bd2f668308a51f7. llvm-svn: 302014
* [AVR] Save/restore the frame pointer for all functionsDylan McKay2017-05-021-11/+10
| | | | | | | A recent commit I made made it so that we only did this for signal or interrupt handlers. This broke normal functions. llvm-svn: 301893
* [AVR] Fix a bug where the frame pointer is clobberedDylan McKay2017-05-021-7/+17
| | | | | | | | | | | | | | | Because it was a callee-saved register, we automatically generated code to spill and unspill its original value so that it is restored after the function returns. The problem is that this code was being generated before the epilogue. The epilogue itself uses the Y register, which could be prematurely restored by the CSR restoration process. This removes R29R28 from the CSR list and changes the prologue/epilogue code to handle it explicitly. llvm-svn: 301887
* [AVR] Enable the frame pointer for all functionsDylan McKay2017-05-011-2/+3
| | | | | | | This is a temporary measure while we figure out a way to get the frame pointer working correctly. llvm-svn: 301881
* [AVR] Implement non-constant bit rotationsDylan McKay2017-05-013-1/+63
| | | | | | This lets us do bit rotations of variable amount. llvm-svn: 301794
* [AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offsetDylan McKay2017-04-303-8/+9
| | | | | | | Before this, the LDS/STS instructions would have their opcodes overwritten while linking. llvm-svn: 301782
* [AVR] Remove an unused local variableDylan McKay2017-04-261-1/+0
| | | | llvm-svn: 301413
* [AVR] Do not kill the dest register for a pseudo instructionDylan McKay2017-04-251-1/+1
| | | | | | | It caused the register to later be dead, which would trigger a verifier error. llvm-svn: 301368
* [AVR] Support the LDWRdPtr instruction with the same Src+Dst registerDylan McKay2017-04-251-52/+75
| | | | llvm-svn: 301313
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-242-6/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D31937 llvm-svn: 301234
* Revert r301231: Accidentally committed stale filesKrzysztof Parzyszek2017-04-242-7/+6
| | | | | | I forgot to commit local changes before commit. llvm-svn: 301232
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-242-6/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D31937 llvm-svn: 301231
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-242-3/+4
| | | | | | | | | | | | | | | 1. RegisterClass::getSize() is split into two functions: - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const; - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const; 2. RegisterClass::getAlignment() is replaced by: - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const; This will allow making those values depend on subtarget features in the future. Differential Revision: https://reviews.llvm.org/D31783 llvm-svn: 301221
* [AVR] Migrate to new MCAsmInfo CodePointerSizeLeslie Zhai2017-04-191-1/+0
| | | | | | | | | | | | Reviewers: dylanmckay, rengolin, kzhuravl, jroelofs Reviewed By: kzhuravl, jroelofs Subscribers: kzhuravl, llvm-commits Differential Revision: https://reviews.llvm.org/D32154 llvm-svn: 300641
* [AVR] Fix the buildDylan McKay2017-04-181-1/+1
| | | | | | 'PointerSize' was renamed to 'CodePointerSize'. llvm-svn: 300629
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