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* Rename LoadX to LoadExt.Evan Cheng2008-10-141-2/+2
| | | | llvm-svn: 57526
* Update ARM Insn encoding to get endian-ness to match the documentation (31-0 ↵Jim Grosbach2008-10-142-61/+57
| | | | | | left to right) llvm-svn: 57524
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-141-2/+2
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-112-8/+5
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Comment to be explicit that the enumeration values for CondCodes matter.Jim Grosbach2008-10-081-0/+2
| | | | llvm-svn: 57295
* Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to ↵Jim Grosbach2008-10-071-1/+1
| | | | | | get the proper opcode bits. llvm-svn: 57262
* need ARM.h for ARMCC definitionJim Grosbach2008-10-071-0/+1
| | | | llvm-svn: 57261
* Encode the conditional execution predicate when JITing.Jim Grosbach2008-10-072-10/+16
| | | | llvm-svn: 57258
* Clarify naming and correct conditional so that CMP and CMN instructions get ↵Jim Grosbach2008-10-071-8/+5
| | | | | | the Rn operand encoded properly llvm-svn: 57252
* Fix Opcode values of CMP and CMNJim Grosbach2008-10-071-4/+4
| | | | llvm-svn: 57251
* Fix weird think-o and unbreak build on all gcc-3.4.x-based platforms (e.g. ↵Anton Korobeynikov2008-10-051-9/+4
| | | | | | mingw) llvm-svn: 57106
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-031-3/+1
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Indexing off by one resulted in errant encoding of source register forJim Grosbach2008-10-031-1/+1
| | | | | | reg->reg moves. llvm-svn: 57011
* NeedStub/DoesntNeedStub logic was reversed, leading to not using a stubJim Grosbach2008-10-031-4/+4
| | | | | | for global relocations that do need them (libc calls, for example). llvm-svn: 57010
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-036-50/+50
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Fix typo s/ther/there/Jim Grosbach2008-10-011-1/+1
| | | | llvm-svn: 56924
* Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands2008-09-291-1/+1
| | | | | | | instead of hasWeakLinkage in a bunch of optimization passes. llvm-svn: 56782
* Re-apply 56683 with fixes.Evan Cheng2008-09-271-1/+2
| | | | llvm-svn: 56748
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-3/+1
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-1/+3
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* Add "inreg" field to CallSDNode (doesn't increaseDale Johannesen2008-09-261-1/+1
| | | | | | | | | its size). Adjust various lowering functions to pass this info through from CallInst. Use it to implement sseregparm returns on X86. Remove X86_ssecall calling convention. llvm-svn: 56677
* CMake: Builds all targets.Oscar Fuentes2008-09-261-0/+26
| | | | llvm-svn: 56641
* Reapply 56585:56589 with proper fix for some gcc versionsAnton Korobeynikov2008-09-253-33/+47
| | | | llvm-svn: 56621
* Temporarily backing out 56585:56589 to unbreak the build.Evan Cheng2008-09-253-40/+33
| | | | llvm-svn: 56607
* Get rid of virtual inheritance for ARM TAIAnton Korobeynikov2008-09-243-33/+40
| | | | llvm-svn: 56587
* Get rid of ReadOnlySection duplicateAnton Korobeynikov2008-09-241-2/+0
| | | | llvm-svn: 56582
* Get rid of now unused {Four,Eight,Sixteen}ByteConstantSectionAnton Korobeynikov2008-09-241-5/+0
| | | | llvm-svn: 56580
* Get rid of duplicate char*/Section* stuff for TLS sectionsAnton Korobeynikov2008-09-241-2/+0
| | | | llvm-svn: 56577
* Get rid of duplicate char*/Section* DataSectionAnton Korobeynikov2008-09-241-1/+0
| | | | llvm-svn: 56575
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-2/+1
| | | | llvm-svn: 56573
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-9/+0
| | | | llvm-svn: 56572
* Fix these enums' starting values to reflect the way thatDan Gohman2008-09-231-1/+1
| | | | | | instruction opcodes are now numbered. No functionality change. llvm-svn: 56497
* Make log, log2, log10, exp, exp2 use Expand byDale Johannesen2008-09-221-10/+0
| | | | | | default. llvm-svn: 56471
* Duh. Default to ARMCC::AL (always).Evan Cheng2008-09-181-23/+63
| | | | llvm-svn: 56301
* Clean up.Evan Cheng2008-09-181-4/+8
| | | | llvm-svn: 56300
* Cosmetic.Evan Cheng2008-09-181-3/+5
| | | | llvm-svn: 56299
* Fix addrmode1 instruction encodings; fix bx_ret encoding.Evan Cheng2008-09-173-37/+49
| | | | llvm-svn: 56277
* Specify instruction encoding using range list to avoid endianess issues.Evan Cheng2008-09-171-25/+26
| | | | llvm-svn: 56276
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-11/+12
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-12/+11
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-131-1/+1
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Fix random abort.Evan Cheng2008-09-131-2/+4
| | | | llvm-svn: 56184
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-131-12/+12
| | | | | | | | | | | | | Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. llvm-svn: 56183
* Typo.Evan Cheng2008-09-131-3/+3
| | | | llvm-svn: 56182
* Rely on instruction format to determine so_reg operand for now.Evan Cheng2008-09-131-1/+5
| | | | llvm-svn: 56181
* Revert 56176. All those instruction formats are still needed.Evan Cheng2008-09-134-49/+84
| | | | llvm-svn: 56180
* Accidentially flipped the condition.Evan Cheng2008-09-131-1/+1
| | | | llvm-svn: 56179
* Add debug dumps.Evan Cheng2008-09-131-0/+5
| | | | llvm-svn: 56178
* Eliminate unnecessary instruction formats.Evan Cheng2008-09-124-90/+51
| | | | llvm-svn: 56176
* Addrmode 1 S bit can be dynamically set. Look for CPSR def.Evan Cheng2008-09-122-28/+42
| | | | llvm-svn: 56172
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