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* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-184-838/+846
| | | | | | | FU per CPU arch to 32 per intinerary allowing precise modelling of quite complex pipelines in the future. llvm-svn: 101754
* Fix -Wcast-qual warnings.Dan Gohman2010-04-171-4/+5
| | | | llvm-svn: 101655
* Add const qualifiers to TargetLoweringObjectFile usage.Dan Gohman2010-04-171-4/+5
| | | | llvm-svn: 101640
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-174-61/+72
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-173-15/+26
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Revise my previous change to ExpandBIT_CONVERT. I hadn't realized that thisBob Wilson2010-04-171-12/+22
| | | | | | | | | may be called when either the source or destination type is i64, and my change also hadn't fixed the most obvious problem -- assuming that i64 will only be bitconverted to f64, ignoring the various vector types. Radar 7873160. llvm-svn: 101615
* Cast to (uint64_t) instead of relying on the "ul" suffix.Johnny Chen2010-04-161-1/+1
| | | | llvm-svn: 101573
* Add skeleton target-specific SelectionDAGInfo files.Dan Gohman2010-04-163-0/+52
| | | | llvm-svn: 101564
* Fixed logic error. Should check Builder for validity before calling SetSessionJohnny Chen2010-04-161-3/+2
| | | | | | on it. llvm-svn: 101563
* Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen2010-04-163-5/+26
| | | | | | | | | | case. Also, the 0xFF hex literal involved in the shift for ESize64 should be suffixed "ul" to preserve the shift result. Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand(). llvm-svn: 101557
* In the same spirit of r101524, which removed the assert() from ↵Johnny Chen2010-04-162-2/+0
| | | | | | | | printAddrMode2OffsetOperand(), this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case. llvm-svn: 101529
* Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen2010-04-161-4/+4
| | | | | | | | | to the UAL syntax of LDCL<c>, instead. Add a test case for this change which also tests the removal of assert() from printAddrMode2OffsetOperand(). llvm-svn: 101527
* Remove the assert() from printAddrMode2OffsetOperand(). "#0 and #-0" areJohnny Chen2010-04-162-2/+0
| | | | | | | | | considered legal instructions. Refs: A8.6.51 LDC, LDC2 (immediate) -- page A8-107, A8.6.58 LDR (immediate, ARM) -- page A8-121, and A8.6.194 STR (immediate, ARM) -- page A8-395. llvm-svn: 101524
* Use getAL() rather than a major constant.Evan Cheng2010-04-161-9/+9
| | | | llvm-svn: 101446
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-151-1/+1
| | | | | | am2offset. Modified the instruction table entry and added a new test case. llvm-svn: 101415
* Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle ↵Evan Cheng2010-04-152-62/+1
| | | | | | is doing the right thing and codegen looks correct for both Thumb and Thumb2. llvm-svn: 101410
* ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP ↵Evan Cheng2010-04-151-1/+1
| | | | | | | | directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908 llvm is generating poor code for dynamic alloca, I'll fix that later. llvm-svn: 101383
* DEBUG() print out "Unknown format" msg.Johnny Chen2010-04-151-1/+3
| | | | llvm-svn: 101382
* ReuseFrameIndexVals is used in multiple files, so it can't be static.Dan Gohman2010-04-152-3/+9
| | | | llvm-svn: 101379
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101376
* Add more const qualifiers for LLVM IR pointers in CodeGen.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101342
* Fix build.Anders Carlsson2010-04-151-1/+1
| | | | llvm-svn: 101335
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-1511-30/+34
| | | | llvm-svn: 101334
* Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.Johnny Chen2010-04-152-4/+7
| | | | llvm-svn: 101329
* Fixed another assert exposed by fuzzing. Now, the DisassembleVFPLdStMulFrm()Johnny Chen2010-04-141-0/+6
| | | | | | | function checks whether we have a valid submode for VLDM/VSTM (must be either "ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char). llvm-svn: 101306
* Add -arm-long-calls option to force calls to be indirect. This makes theJim Grosbach2010-04-141-2/+44
| | | | | | | | kernel linker happier when dealing with kexts. Radar 7805069 llvm-svn: 101303
* For t2BFI disassembly, apply the same error checking as in r101205.Johnny Chen2010-04-142-3/+6
| | | | | | Change the error msg to read "Encoding error: msb < lsb". llvm-svn: 101293
* Fixed another assert exposed by fuzzing. The utility function getRegisterEnum()Johnny Chen2010-04-144-319/+352
| | | | | | | | | | | | | | was asserting because the (RegClass, RegNum) combination doesn't make sense from an encoding point of view. Since getRegisterEnum() is used all over the place, to change the code to check for encoding error after each call would not only bloat the code, but also make it less readable. An Err flag is added to the ARMBasicMCBuilder where a client can set a non-zero value to indicate some kind of error condition while building up the MCInst. ARMBasicMCBuilder::BuildIt() checks this flag and returns false if a non-zero value is detected. llvm-svn: 101290
* Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson2010-04-141-9/+16
| | | | | | | does not have a legal type. The legalizer does not know how to handle those nodes. Radar 7854640. llvm-svn: 101282
* Fixed another assert exposed by fuzzing. Now, when an encoding error occursJohnny Chen2010-04-141-4/+14
| | | | | | | involing getBFCInvMask() where lsb <= msb does not hold true, the disassembler just returns false, instead of assert, to indicate disassembly error. llvm-svn: 101205
* Fixed an assert() exposed by fuzzing. Now, instead of assert when an invalidJohnny Chen2010-04-142-10/+15
| | | | | | | instruction encoding is encountered, we just return a NULL ARMBasicMCBuilder instance and the client just returns false to indicate disassembly error. llvm-svn: 101201
* Unbreak CMake build by improving the EnhancedDisassembly makefile aDouglas Gregor2010-04-131-0/+1
| | | | | | | bit (we're not trying to build a shared library yet) and generating the X86GenEDInfo.inc and ARMGenEDInfo.inc files as necessary. llvm-svn: 101188
* Handle a v2f64 formal parameter that is split between registers and memoryBob Wilson2010-04-131-7/+13
| | | | | | such that the entire second half is in memory. Radar 7855014. llvm-svn: 101181
* Fixed a nasty layering violation in the edis sourceSean Callanan2010-04-132-2/+19
| | | | | | | | | | | | | | | code. It used to #include the enhanced disassembly information for the targets it supported straight out of lib/Target/{X86,ARM,...} but now it uses a new interface provided by MCDisassembler, and (so far) implemented by X86 and ARM. Also removed hacky #define-controlled initialization of targets in edis. If clients only want edis to initialize a limited set of targets, they can set --enable-targets on the configure command line. llvm-svn: 101179
* Changed getSOImmValRotate()'s hunt retry logic to ignore the low order 6 bits,Johnny Chen2010-04-131-3/+3
| | | | | | instead of 7, because we are only looking for even rotate amount. llvm-svn: 101172
* Use MachineBasicBlock::isLiveIn.Dan Gohman2010-04-131-8/+1
| | | | llvm-svn: 101144
* Replace r101053 with a fix for getSOImmValRotate() so that it will correctlyBob Wilson2010-04-132-53/+7
| | | | | | | recognize all the valid rotated immediates. This fixes the disassembler issue and will also help codegen for some unusual constant values. llvm-svn: 101114
* Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after callingJohnny Chen2010-04-122-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2. Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V). [12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009) Copyright 2004 Free Software Foundation, Inc. GDB is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. Type "show copying" to see the conditions. There is absolutely no warranty for GDB. Type "show warranty" for details. This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done (gdb) set args -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble (gdb) r Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble Reading symbols for shared libraries ++. done 0xf5 0x71 0xf0 0x53 Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1| ------------------------------------------------------------------------------------------------- mvnpls r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229. Program received signal SIGABRT, Aborted. 0x00007fff88c65886 in __kill () (gdb) bt #0 0x00007fff88c65886 in __kill () #1 0x00007fff88d05eae in abort () #2 0x00007fff88cf2ef0 in __assert_rtn () #3 0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229 #4 0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254 #5 0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236 #6 0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182 #7 0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65 #8 0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153 #9 0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347 #10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374 (gdb) q The program is running. Exit anyway? (y or n) y [13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ llvm-svn: 101053
* Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargetsBob Wilson2010-04-092-2/+35
| | | | | | | | | such that the non-VFP versions have no implicit defs of VFP registers. If any callee-saved VFP registers are marked as having been defined, the prologue/epilogue code will try to save and restore them. Radar 7770432. llvm-svn: 100892
* delete a forwarding function.Chris Lattner2010-04-081-6/+9
| | | | llvm-svn: 100815
* remove the TargetLoweringObjectFileMachO::getMachoSectionChris Lattner2010-04-081-6/+6
| | | | | | api and update clients to use MCContext instead. llvm-svn: 100808
* Added support for ARM disassembly to edis.Sean Callanan2010-04-081-1/+1
| | | | | | | | | | | I also added a rule to the ARM target's Makefile to build the ARM-specific instruction information table for the enhanced disassembler. I will add the test harness for all this stuff in a separate commit. llvm-svn: 100735
* Update CMake build.Ted Kremenek2010-04-071-0/+1
| | | | llvm-svn: 100714
* rename llvm::llvm_report_error -> llvm::report_fatal_errorChris Lattner2010-04-072-3/+3
| | | | llvm-svn: 100709
* Missed this one line for the previous checkin to fix build warnings.Johnny Chen2010-04-071-1/+0
| | | | llvm-svn: 100697
* Fixed warnings pointed out by clang.Johnny Chen2010-04-071-7/+19
| | | | llvm-svn: 100696
* Fixed warnings pointed out by clang.Johnny Chen2010-04-071-2/+16
| | | | | | Next to work on is ARMDisassemblerCore.cpp. llvm-svn: 100695
* Fixed 3 warnings pointed out by clang.Johnny Chen2010-04-071-3/+3
| | | | llvm-svn: 100693
* Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call inJohnny Chen2010-04-072-2/+19
| | | | | | ARMDecoderEmitter.cpp, with FIXME comment. llvm-svn: 100690
* Added an AsmLexer for the ARM target, which usesSean Callanan2010-04-072-0/+143
| | | | | | | a simple mapping of register names to IDs to identify register tokens. llvm-svn: 100685
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