bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	[ARM64] Flag setting logical/add/sub immediate instructions don't use SP.	Bradley Smith	2014-04-09	1	-4/+14
*	[ARM64] Fix disassembly logic for extended loads/stores with 32-bit registers.	Bradley Smith	2014-04-09	1	-2/+2
*	[ARM64] Ensure sp is decoded as SP, not XZR in LD1 instructions.	Bradley Smith	2014-04-09	1	-2/+2
*	[ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.	Bradley Smith	2014-04-09	1	-6/+18
*	[ARM64] Use PStateMapper to ensure that MSRcpsr operands are validated during...	Bradley Smith	2014-04-09	1	-2/+7
*	[ARM64] Switch the decoder, disassembler, instprinter and asmparser over to u...	Bradley Smith	2014-04-09	1	-7/+26
*	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. ...	Bradley Smith	2014-04-09	1	-1/+1
*	[ARM64] Shifted register ALU ops are reserved if sf=0 and imm6<5>=1, and also...	Bradley Smith	2014-04-09	1	-9/+20
*	[ARM64] STRHro and STRBro were not being decoded at all.	Bradley Smith	2014-04-09	1	-0/+2
*	[ARM64] MOVK with sf=0 and hw<1>=1 is unallocated. Shift amount for ADD/SUB i...	Bradley Smith	2014-04-09	1	-0/+6
*	[ARM64] Register-offset loads and stores with the 'option' field equal to 00x...	Bradley Smith	2014-04-09	1	-14/+5
*	Fixing warnings in the MSVC build. No functional changes intended.	Aaron Ballman	2014-04-01	1	-2/+2
*	Try to fix MSan bootstrap bot: make ARM64Disassembler::getInstruction() alway...	Alexey Samsonov	2014-03-31	1	-2/+2
*	[ARM64] Fix 'assert("...")' to be 'assert(0 && "...")'. Otherwise, it is	Chandler Carruth	2014-03-29	1	-1/+1
*	ARM64: initial backend import	Tim Northover	2014-03-29	1	-0/+2142