bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
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*	ARM64AsmParser.cpp: Fix vg_leak in MC/ARM64/fp-encoding.s.	NAKAMURA Takumi	2014-04-15	1	-0/+2
\| \| \| \|	llvm-svn: 206279
*	Optional hash symbol feature support for ARM64	Stepan Dyatkovskiy	2014-04-15	1	-16/+37
\| \| \| \| \| \|	http://reviews.llvm.org/D3328 llvm-svn: 206276
*	LLVMBuild.txt: Add missing dependencies.	NAKAMURA Takumi	2014-04-10	1	-1/+1
\| \| \| \|	llvm-svn: 205962
*	LLVMBuild.txt: Reformat.	NAKAMURA Takumi	2014-04-10	1	-1/+0
\| \| \| \|	llvm-svn: 205961
*	[ARM64] Fix canonicalisation of MOVs. MOV is too complex to be modelled by a ↵	Bradley Smith	2014-04-09	1	-11/+60
\| \| \| \| \| \|	dumb alias. llvm-svn: 205889
*	[ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all ↵	Bradley Smith	2014-04-09	1	-41/+66
\| \| \| \| \| \|	labels types llvm-svn: 205888
*	[ARM64] Rename LR to the UAL-compliant 'X30'.	Bradley Smith	2014-04-09	1	-1/+1
\| \| \| \|	llvm-svn: 205885
*	[ARM64] Rename FP to the UAL-compliant 'X29'.	Bradley Smith	2014-04-09	1	-1/+1
\| \| \| \|	llvm-svn: 205884
*	[ARM64] Add missing tlbi operands and error for extra/missing register on ↵	Bradley Smith	2014-04-09	1	-0/+18
\| \| \| \| \| \|	tlbi aliases. llvm-svn: 205876
*	[ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.	Bradley Smith	2014-04-09	1	-134/+71
\| \| \| \|	llvm-svn: 205875
*	[ARM64] Remove PrefetchOp and use ARM64PRFM instead.	Bradley Smith	2014-04-09	1	-21/+10
\| \| \| \|	llvm-svn: 205872
*	[ARM64] Add WZR to isGPR32Register, since every use needs to check for this ↵	Bradley Smith	2014-04-09	1	-4/+3
\| \| \| \| \| \|	anyway. llvm-svn: 205871
*	[ARM64] Move CPSRField and DBarrier operands over to AArch64-style ↵	Bradley Smith	2014-04-09	1	-46/+34
\| \| \| \| \| \|	disassembly and assembly. This removes the last users of namespace ARM64SYS. llvm-svn: 205869
*	[ARM64] Switch the decoder, disassembler, instprinter and asmparser over to ↵	Bradley Smith	2014-04-09	1	-314/+30
\| \| \| \| \| \|	using AArch64-style system registers, and fix up test failures discovered in the process. llvm-svn: 205868
*	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. ↵	Bradley Smith	2014-04-09	1	-1/+1
\| \| \| \| \| \|	These files are required in the decoder, disassembler and parser, and a layering violation was imminent. llvm-svn: 205867
*	[ARM64] Add support for NV condition code (exists only for valid ↵	Bradley Smith	2014-04-09	1	-22/+5
\| \| \| \| \| \|	assembly/disassembly, equivilant to AL) llvm-svn: 205864
*	[ARM64] Add parsing for vector lists such as {v0.8b-v3.8b}	Bradley Smith	2014-04-09	1	-19/+43
\| \| \| \|	llvm-svn: 205862
*	[ARM64] Correctly alias LSL to UXTW for 32bit instruction variants, rather ↵	Bradley Smith	2014-04-09	1	-3/+3
\| \| \| \| \| \|	than UXTX llvm-svn: 205861
*	Fixing warnings in the MSVC build. No functional changes intended.	Aaron Ballman	2014-04-01	1	-6/+6
\| \| \| \|	llvm-svn: 205301
*	[ARM64] Fix a heap-use-after-free spotted by ASan.	Chandler Carruth	2014-03-30	1	-1/+1
\| \| \| \| \| \| \| \|	StringRef::lower() returns a std::string. Better yet, we can now stop thinking about what it returns and write 'auto'. It does the right thing. =] llvm-svn: 205135
*	Fix a few -Wdocumentation warnings	Dmitri Gribenko	2014-03-29	1	-1/+1
\| \| \| \|	llvm-svn: 205116
*	ARM64: initial backend import	Tim Northover	2014-03-29	4	-0/+4877
	This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090