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path: root/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
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* Avoid some 's' 16-bit instruction which partially update CPSRBob Wilson2011-04-191-85/+165
* Handle MI flags inside Thumb2SizeReduction pass.Anton Korobeynikov2011-03-051-0/+9
* Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ...Owen Anderson2011-02-081-43/+9
* Temporary workaround for a bad bug introduced by r121082 which replacedEvan Cheng2011-02-081-8/+5
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-29/+36
* Refactor the ARM CMPz* patterns to just use the normal CMP instructions whenJim Grosbach2010-12-071-5/+3
* Second attempt at converting Thumb2's LDRpci, including updating the gazillio...Owen Anderson2010-12-071-6/+42
* The Thumb tADDrSPi instruction is not valid when the destination is SP.Bob Wilson2010-12-041-1/+8
* Correctly size-reduce the t2CMPzrr instruction to tCMPzr when possible.Jim Grosbach2010-12-031-1/+13
* Reduce t2 ldr/str instructions to the correct t1 versions when there's anJim Grosbach2010-12-031-6/+6
* Size reduction for tPUSH come from t2STMDB_UPD, not t2STMIA_UPD.Jim Grosbach2010-12-031-1/+2
* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-161-19/+24
* Clarify commentJim Grosbach2010-09-141-2/+2
* To shrink a t2LDM instruction to the 16-bit wide tLDM instruction, the baseJim Grosbach2010-09-071-0/+12
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
* Don't use PassInfo* as a type identifier for passes. Instead, use the addres...Owen Anderson2010-08-051-1/+1
* PR7458: Try commuting Thumb2 instruction operands to put them into 2-addressBob Wilson2010-06-241-3/+11
* fix typoJim Grosbach2010-06-081-1/+1
* Use MachineBasicBlock::isLiveIn.Dan Gohman2010-04-131-8/+1
* Fix another warning. There is a functionality change but I believe it's correct.Benjamin Kramer2010-03-131-2/+2
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-131-16/+35
* Radar 7417921Jim Grosbach2010-02-091-1/+1
* Fix PR5694. The CMN instructions set the flags differently from CMP, so theyJim Grosbach2010-01-221-1/+2
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-1/+1
* Materialize global addresses via movt/movw pair, this is always betterAnton Korobeynikov2009-11-241-1/+7
* Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.Evan Cheng2009-11-191-8/+26
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-1/+1
* Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudoEvan Cheng2009-09-281-0/+1
* Cast MO.getImm() to unsigned before comparing with an unsigned limit.Evan Cheng2009-09-091-1/+1
* Remove some not-really-used variables, as warnedDuncan Sands2009-09-061-2/+0
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-3/+4
* Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used a...Benjamin Kramer2009-08-161-1/+4
* Turn on if-conversion for thumb2.Evan Cheng2009-08-151-6/+14
* Shrink ADR and LDR from constantpool late during constantpool island pass.Evan Cheng2009-08-141-0/+2
* PredCC is meant to be 2 bits wide, like PredCC1.Evan Cheng2009-08-121-1/+1
* Shrink Thumb2 movcc instructions.Evan Cheng2009-08-121-1/+2
* Shrink ADDS, ADC, RSB, and SUBS.Evan Cheng2009-08-121-29/+103
* Shrinkify Thumb2 r = add sp, imm.Evan Cheng2009-08-111-7/+18
* Shrinkify Thumb2 load / store multiple instructions.Evan Cheng2009-08-111-34/+84
* Fix the previous accidental commit. Now shrinking common Thumb2 load / store ...Evan Cheng2009-08-111-2/+4
* Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form toEvan Cheng2009-08-111-2/+140
* Watch out for empty BB.Evan Cheng2009-08-101-1/+1
* rev, rev16, and revsh do not set CPSR.Evan Cheng2009-08-101-3/+3
* Duh. Most 16-bit Thumb rr instructions are two-address. Fix table.Evan Cheng2009-08-101-9/+15
* CPSR can be livein; transfer predicate operands correctly; tMUL is two-address.Evan Cheng2009-08-101-19/+57
* Add support to reduce most of 32-bit Thumb2 arithmetic instructions.Evan Cheng2009-08-101-69/+147
* Add support to convert 32-bit instructions to 16-bit non-two-address ones.Evan Cheng2009-08-091-35/+96
* Add a skeleton Thumb2 instruction size reduction pass.Evan Cheng2009-08-081-0/+213
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