| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix undefined behavior (negation of INT_MIN) in ARM backend. | Richard Smith | 2012-08-24 | 1 | -1/+1 |
| * | Remove getARMRegisterNumbering and replace with calls into | Eric Christopher | 2012-08-09 | 1 | -32/+34 |
| * | Fix #13241, a bug around shift immediate operand for ARM instruction ADR. | Jiangning Liu | 2012-08-02 | 1 | -7/+17 |
| * | Allow MCCodeEmitter access to the target MCRegisterInfo. | Jim Grosbach | 2012-05-15 | 1 | -0/+1 |
| * | ARM: allow vanilla expressions for movw/movt. | Jim Grosbach | 2012-05-01 | 1 | -4/+16 |
| * | Unify internal representation of ARM instructions with a register right-shift... | Richard Barton | 2012-04-25 | 1 | -2/+1 |
| * | Ensure conditional BL instructions for ARM are given the fixup fixup_arm_cond... | James Molloy | 2012-03-30 | 1 | -2/+6 |
| * | Remove unnecessary llvm:: qualifications | Craig Topper | 2012-03-27 | 1 | -2/+2 |
| * | ARM BL/BLX instruction fixups should use relocations. | Jim Grosbach | 2012-02-27 | 1 | -8/+15 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 1 | -3/+3 |
| * | Keep source information, if available, around for ARM Fixups. | Jim Grosbach | 2012-01-26 | 1 | -6/+6 |
| * | Widen the instruction encoder that TblGen emits to a 64 bits, which should ac... | Owen Anderson | 2012-01-24 | 1 | -1/+1 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -3/+1 |
| * | Thumb2 alternate syntax for LDR(literal) and friends. | Jim Grosbach | 2012-01-18 | 1 | -0/+1 |
| * | Remove unnecessary default cases in switches that cover all enum values. | David Blaikie | 2012-01-10 | 1 | -1/+0 |
| * | ARM assembly parsing and encoding support for LDRD(label). | Jim Grosbach | 2011-12-19 | 1 | -1/+14 |
| * | ARM NEON relax parse time diagnostics for alignment specifiers. | Jim Grosbach | 2011-12-19 | 1 | -4/+4 |
| * | ARM encoder method needs the physical register number, not the enum. | Jim Grosbach | 2011-12-02 | 1 | -1/+1 |
| * | Fix encoding of Thumb2 shifted register operands with RRX shifts. | Owen Anderson | 2011-09-13 | 1 | -0/+1 |
| * | Zap some junk from the ARM instruction descriptions. | Eli Friedman | 2011-09-13 | 1 | -14/+0 |
| * | Fix encoding of PC-relative LDRSHW with an immediate offset. | Owen Anderson | 2011-09-12 | 1 | -10/+19 |
| * | Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. | Owen Anderson | 2011-09-09 | 1 | -1/+6 |
| * | Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. | Jim Grosbach | 2011-09-09 | 1 | -0/+20 |
| * | Thumb2 assembly parsing and encoding for LDRD(immediate). | Jim Grosbach | 2011-09-08 | 1 | -0/+41 |
| * | Fix encoding for tBcc with immediate offset operand. | Owen Anderson | 2011-08-31 | 1 | -1/+5 |
| * | Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead... | Owen Anderson | 2011-08-31 | 1 | -3/+31 |
| * | Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather th... | Owen Anderson | 2011-08-30 | 1 | -1/+4 |
| * | Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead... | Owen Anderson | 2011-08-30 | 1 | -1/+4 |
| * | Fix encoding of Thumb1 B instructions with immediate offsets, which is necess... | Owen Anderson | 2011-08-30 | 1 | -1/+4 |
| * | Clean up whitespace. | Owen Anderson | 2011-08-30 | 1 | -8/+8 |
| * | Improve handling of #-0 offsets for many more pre-indexed addressing modes. | Owen Anderson | 2011-08-29 | 1 | -1/+3 |
| * | Improve encoding support for BLX with immediat eoperands, and fix a BLX decod... | Owen Anderson | 2011-08-26 | 1 | -1/+15 |
| * | Correct encoding of BL with immediate offset. | Owen Anderson | 2011-08-26 | 1 | -5/+10 |
| * | Support an extension of ARM asm syntax to allow immediate operands to ADR ins... | Owen Anderson | 2011-08-26 | 1 | -9/+22 |
| * | ARM clean up the imm_sr operand class representation. | Jim Grosbach | 2011-08-17 | 1 | -10/+0 |
| * | Correct immediate range for shifter operands. Patch by James Molloy, with ad... | Owen Anderson | 2011-08-11 | 1 | -1/+4 |
| * | Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang... | Owen Anderson | 2011-08-08 | 1 | -0/+13 |
| * | ARM simplify the postidx_reg operand encoding. | Jim Grosbach | 2011-08-05 | 1 | -2/+1 |
| * | ARM refactoring assembly parsing of memory address operands. | Jim Grosbach | 2011-08-03 | 1 | -0/+16 |
| * | Update comments. | Owen Anderson | 2011-07-28 | 1 | -18/+10 |
| * | Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. | Evan Cheng | 2011-07-27 | 1 | -5/+0 |
| * | ARM parsing and encoding of SBFX and UBFX. | Jim Grosbach | 2011-07-27 | 1 | -5/+0 |
| * | ARM cleanup of rot_imm encoding. | Jim Grosbach | 2011-07-26 | 1 | -11/+0 |
| * | Sink ARM mc routines into MCTargetDesc. | Evan Cheng | 2011-07-23 | 1 | -0/+1339 |
