summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/AsmPrinter
Commit message (Collapse)AuthorAgeFilesLines
...
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-092-15/+4
| | | | llvm-svn: 86494
* Support alignment specifier for NEON vld/vst instructionsJim Grosbach2009-11-071-2/+10
| | | | llvm-svn: 86404
* It turns out that the testcase in question uncovered subreg-handling bug.Anton Korobeynikov2009-11-072-3/+2
| | | | | | | Add assert in asmprinter to catch such cases and xfail the tests. PR is to be filled. llvm-svn: 86375
* Honour subreg machine operands during asmprintingAnton Korobeynikov2009-11-061-0/+3
| | | | llvm-svn: 86303
* Print VMOV (immediate) operands as hexadecimal values. Apple's assemblerBob Wilson2009-11-062-0/+18
| | | | | | | | | will not accept negative values for these. LLVM's default operand printing sign extends values, so that valid unsigned values appear as negative immediates. Print all VMOV immediate operands as hex values to resolve this. Radar 7372576. llvm-svn: 86301
* Remove ARMPCLabelIndex from ARMISelLowering. Use ↵Evan Cheng2009-11-061-3/+5
| | | | | | ARMFunctionInfo::createConstPoolEntryUId() instead. llvm-svn: 86294
* Factor out the printing of the leading tab into printInlineAsm.Dan Gohman2009-11-061-1/+0
| | | | llvm-svn: 86199
* Print out an informative comment for KILL instructions.Jakob Stoklund Olesen2009-11-041-0/+1
| | | | | | | | The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output. With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF. llvm-svn: 86041
* fconsts / fconstd immediate should be proceeded with #.Evan Cheng2009-11-031-2/+2
| | | | llvm-svn: 85952
* Add support for BlockAddress values in ARM constant pools.Bob Wilson2009-11-021-3/+7
| | | | llvm-svn: 85806
* Add ARM codegen for indirect branches.Bob Wilson2009-10-301-0/+4
| | | | | | clang/test/CodeGen/indirect-goto.c runs! (unoptimized) llvm-svn: 85577
* Use fconsts and fconstd to materialize small fp constants.Evan Cheng2009-10-282-6/+35
| | | | llvm-svn: 85362
* Change ARM asm strings to separate opcode from operands with a tab instead ↵Evan Cheng2009-10-261-1/+1
| | | | | | of a space. llvm-svn: 85178
* tidyChris Lattner2009-10-211-1/+1
| | | | llvm-svn: 84738
* Fix -Asserts warning.Daniel Dunbar2009-10-201-2/+3
| | | | llvm-svn: 84687
* implement some more easy hooks.Chris Lattner2009-10-202-3/+34
| | | | llvm-svn: 84614
* Implement some hooks, make printOperand abort if unknown modifiers areChris Lattner2009-10-202-9/+129
| | | | | | present. llvm-svn: 84613
* t2MOVi32imm is currently always lowered by the Thumb2ITBlockPass.Chris Lattner2009-10-201-2/+2
| | | | llvm-svn: 84611
* Wire up the ARM MCInst printer, for llvm-mc.Daniel Dunbar2009-10-201-7/+23
| | | | llvm-svn: 84600
* lower ARM::MOVi32imm properly.Chris Lattner2009-10-201-2/+36
| | | | llvm-svn: 84583
* add support for external symbols. The mc instprinter can now handleChris Lattner2009-10-202-3/+17
| | | | | | | reasonable code like Codegen/ARM/2009-02-27-SpillerBug.ll, producing identical output except for superior formatting of constant pool entries. llvm-svn: 84582
* get fancy: support basic block operands. Yay for jumps.Chris Lattner2009-10-203-15/+12
| | | | llvm-svn: 84579
* add supprort for the 'sbit' operand, MOVi apparently has one.Chris Lattner2009-10-203-1/+11
| | | | llvm-svn: 84577
* add support for instruction predicates.Chris Lattner2009-10-202-3/+8
| | | | llvm-svn: 84575
* implement printSORegOperand, add lowering for the nasty and despicable ↵Chris Lattner2009-10-203-3/+72
| | | | | | MOVi2pieces :) llvm-svn: 84573
* handle addmode4 modifiers, fix a fixme in printRegisterListChris Lattner2009-10-192-10/+4
| | | | | | by ignoring all implicit regs when lowering. llvm-svn: 84566
* use EmitLabel instead of text emissionChris Lattner2009-10-191-4/+6
| | | | llvm-svn: 84562
* add a twine version of MCContext::GetOrCreateSymbol.Chris Lattner2009-10-191-4/+5
| | | | llvm-svn: 84561
* lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entriesChris Lattner2009-10-193-6/+32
| | | | | | | | | | | | | like: @ BB#1: .align 2 LCPI1_0: .long L_.str-(LPC0+8) Note that proper indentation of the label :) llvm-svn: 84558
* add MCInstLower support for lowering ARM::PICADD, a pseudo op for pic stuffola.Chris Lattner2009-10-193-5/+34
| | | | llvm-svn: 84553
* add register list and hacked up addrmode #4 support, we now get this:Chris Lattner2009-10-192-2/+48
| | | | | | | | | | | | | | | | | | _main: stmsp! sp!, {r7, lr} mov r7, sp sub sp, sp, #4 mov r0, #0 str r0, [sp] ldr r0, LCPI1_0 bl _printf ldr r0, [sp] mov sp, r7 ldmsp! sp!, {r7, pc} Note the unhappy ldm/stm because of modifiers being ignored. llvm-svn: 84546
* add addrmode2 support, getting us up to:Chris Lattner2009-10-192-1/+35
| | | | | | | | | | | | | | | | _main: stm , mov r7, sp sub sp, sp, #4 mov r0, #0 str r0, [sp] ldr r0, LCPI1_0 bl _printf ldr r0, [sp] mov sp, r7 ldm , llvm-svn: 84543
* add jump tables, constant pools and some trivial globalChris Lattner2009-10-194-22/+94
| | | | | | | | | | | | | | | | | | | | lowering stuff. We can now compile hello world to: _main: stm , mov r7, sp sub sp, sp, #4 mov r0, #0 str r0, ldr r0, bl _printf ldr r0, mov sp, r7 ldm , Almost looks like arm code :) llvm-svn: 84542
* add printing support for SOImm operands, getting us to:Chris Lattner2009-10-193-4/+40
| | | | | | | | | | | _main: stm , mov r7, sp sub sp, sp, #4 mov r0, #0 str r0, llvm-svn: 84535
* wire up some basic printOperand goodness, giving us stuff like this beforeChris Lattner2009-10-193-20/+34
| | | | | | | | | | | | | we abort: _main: stm , mov r7, sp sub sp, sp, mov r0, str r0, llvm-svn: 84532
* add the files that go with the previous revChris Lattner2009-10-192-0/+135
| | | | llvm-svn: 84531
* wire up skeletal support for having llc print instructionsChris Lattner2009-10-192-11/+58
| | | | | | | | through mcinst lowering -> mcinstprinter, when llc is passed the -enable-arm-mcinst-printer flag. Currently this is very "aborty". llvm-svn: 84530
* wire up ARM's printMCInst method. Now llvm-mc should be able to produce Chris Lattner2009-10-191-0/+5
| | | | | | | "something" when printing MCInsts, it will just be missing all the operand info. llvm-svn: 84528
* stub out a minimal ARMInstPrinter.Chris Lattner2009-10-193-1/+121
| | | | llvm-svn: 84527
* simplify code, reducing string thrashing.Chris Lattner2009-10-191-20/+10
| | | | llvm-svn: 84521
* switch hidden gv stubs to use MachineModuleInfoMachO instead of a custom map.Chris Lattner2009-10-191-14/+21
| | | | llvm-svn: 84520
* use MachineModuleInfoMachO for non-lazy gv stubs instead of a private map.Chris Lattner2009-10-191-14/+23
| | | | llvm-svn: 84519
* remove dead mapChris Lattner2009-10-191-7/+0
| | | | llvm-svn: 84513
* don't bother trying to avoid emitting redundant constant pool alignment ↵Chris Lattner2009-10-191-16/+3
| | | | | | directives. llvm-svn: 84512
* emit .subsections_via_symbols through MCStreamer instead of textually.Chris Lattner2009-10-191-1/+1
| | | | llvm-svn: 84509
* cleanup doFinalization -> EmitEndOfAsmFile.Chris Lattner2009-10-191-6/+3
| | | | llvm-svn: 84508
* Revise ARM inline assembly memory operands to require the memory address toBob Wilson2009-10-131-1/+4
| | | | | | | be in a register. The previous use of ARM address mode 2 was completely arbitrary and inappropriate for Thumb. Radar 7137468. llvm-svn: 84022
* Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via ↵Anton Korobeynikov2009-10-081-3/+4
| | | | | | movt/movw pair. llvm-svn: 83572
* Instead of printing unnecessary basic block labels as labels inDan Gohman2009-10-061-1/+0
| | | | | | | | | | verbose-asm mode, print comments instead. This eliminates a non-comment difference between verbose-asm mode and non-verbose-asm mode. Also, factor out the relevant code out of all the targets and into target-independent code. llvm-svn: 83392
* Update processDebugLoc() so that it can be used to process debug info before ↵Devang Patel2009-10-061-1/+2
| | | | | | and after printing an instruction. llvm-svn: 83363
OpenPOWER on IntegriCloud