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path: root/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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* Small fix to the ARM AsmParser to ensure that aSean Callanan2011-04-181-0/+1
| | | | | | superclass variable is instantiated properly. llvm-svn: 129713
* - Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHTBruno Cardoso Lopes2011-04-041-0/+111
| | | | | | | | | | also fix the encoding of the later. - Add a new encoding bit to describe the index mode used in AM3. - Teach printAddrMode3Operand to check by the addressing mode which index mode to print. - Testcases. llvm-svn: 128832
* Remove unused variablesMatt Beaumont-Gay2011-04-011-3/+1
| | | | llvm-svn: 128692
* Apply again changes to support ARM memory asm parsing. I removedBruno Cardoso Lopes2011-03-311-12/+134
| | | | | | | | | | | | | | all LDR/STR changes and left them to a future patch. Passing all checks now. - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and fix the encoding wherever is possible. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128689
* Revert r128632 again, until I figure out what break the testsBruno Cardoso Lopes2011-03-311-134/+12
| | | | llvm-svn: 128635
* Reapply r128585 without generating a lib depedency cycle. An updated log:Bruno Cardoso Lopes2011-03-311-12/+134
| | | | | | | | | | | | | - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible. - Move all instructions which use am2offset without a pattern to use addrmode2. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128632
* Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"Matt Beaumont-Gay2011-03-311-130/+12
| | | | | | This revision introduced a dependency cycle, as nlewycky mentioned by email. llvm-svn: 128597
* - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT andBruno Cardoso Lopes2011-03-301-12/+130
| | | | | | | | | | | | | | | {STR,LDC}{2}_PRE. - Fixed the encoding in some places. - Some of those instructions were using am2offset and now use addrmode2. Codegen isn't affected, instructions which use SelectAddrMode2Offset were not touched. - Teach printAddrMode2Operand to check by the addressing mode which index mode to print. - This is a work in progress, more work to come. The idea is to change places which use am2offset to use addrmode2 instead, as to unify assembly parser. - Add testcases for assembly parser llvm-svn: 128585
* Suppress an unused variable warning in -asserts buildsMatt Beaumont-Gay2011-03-241-0/+1
| | | | llvm-svn: 128244
* Add asm parsing support w/ testcases for strex/ldrex family of instructionsBruno Cardoso Lopes2011-03-241-0/+26
| | | | llvm-svn: 128236
* Add support to the ARM asm parser for the register-shifted-register forms of ↵Owen Anderson2011-03-181-24/+86
| | | | | | basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA. llvm-svn: 127917
* Avoid dangling else warnings.Joerg Sonnenberger2011-02-191-1/+2
| | | | llvm-svn: 126004
* Fix style and a typoBruno Cardoso Lopes2011-02-181-4/+4
| | | | llvm-svn: 125949
* Add assembly parsing support for "msr" and also fix its encoding. Also addBruno Cardoso Lopes2011-02-181-0/+95
| | | | | | testcases for the disassembler to make sure it still works for "msr". llvm-svn: 125948
* A fail to match coprocessor number and register number must fail instead of ↵Bruno Cardoso Lopes2011-02-141-1/+0
| | | | | | assert. llvm-svn: 125521
* Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes2011-02-141-7/+104
| | | | | | | | | | | | - Add custom operand matching for imod and iflags. - Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC from mnemonic. - While adding ".w" as an operand, don't change "Head" to avoid passing the wrong mnemonic to ParseOperand. - Add asm parser tests. - Add disassembler tests just to make sure it can catch all cps versions. llvm-svn: 125489
* AsmMatcher custom operand parser failure enhancements.Jim Grosbach2011-02-121-20/+29
| | | | | | | | | | | Teach the AsmMatcher handling to distinguish between an error custom-parsing an operand and a failure to match. The former should propogate the error upwards, while the latter should continue attempting to parse with alternative matchers. Update the ARM asm parser accordingly. llvm-svn: 125426
* Add support for parsing dmb/dsb instructionsBruno Cardoso Lopes2011-02-071-0/+58
| | | | llvm-svn: 125055
* Remove the MCR asm parser hack and start using the custom target specific asmBruno Cardoso Lopes2011-02-071-31/+92
| | | | | | | | | | | | | | | | | | parsing of operands introduced in r125030. As a small note, besides using a more generic approach we can also have more descriptive output when debugging llvm-mc, example: mcr p7, #1, r5, c1, c1, #4 note: parsed instruction: ['mcr', <ARMCC::al>, <coprocessor number: 7>, 1, <register 73>, <coprocessor register: 1>, <coprocessor register: 1>, 4] llvm-svn: 125052
* MC/AsmParser: Add support for allowing the conversion process to fail (viaDaniel Dunbar2011-02-041-0/+2
| | | | | | custom conversion functions). llvm-svn: 124872
* Fix 80-column violations and whitespace.Bob Wilson2011-02-031-3/+3
| | | | llvm-svn: 124819
* Changed llvm-mc arm target to give an error if .syntax divided is used. SinceKevin Enderby2011-01-271-1/+1
| | | | | | only .syntax unified is supported. llvm-svn: 124454
* Introduce virtual ParseRegister method in TargetAsmParser.Roman Divacky2011-01-271-0/+7
| | | | | | Create override of this method in X86/ARM/MBlaze. llvm-svn: 124378
* Fix the encoding and parsing of clrex instructionBruno Cardoso Lopes2011-01-201-1/+2
| | | | llvm-svn: 123936
* Add cdp/cdp2 instructions for thumb/thumb2Bruno Cardoso Lopes2011-01-201-1/+1
| | | | llvm-svn: 123929
* - Use a more appropriate name for Owen's ARM Parser isMCR hack since the ↵Bruno Cardoso Lopes2011-01-201-17/+25
| | | | | | | | | | same operands can be present in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions. - Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t hem. llvm-svn: 123927
* Add mcr* and mr*c support to thumb targetsBruno Cardoso Lopes2011-01-201-2/+6
| | | | llvm-svn: 123917
* Fix the encoding of t2ISB by using the right class and also parse it correctlyBruno Cardoso Lopes2011-01-181-1/+1
| | | | llvm-svn: 123776
* Follow the current hack set and enable the correct parsing of bkpt while in ↵Bruno Cardoso Lopes2011-01-181-3/+9
| | | | | | thumb mode. llvm-svn: 123772
* McARM: Use accessors where appropriate.Daniel Dunbar2011-01-181-13/+13
| | | | llvm-svn: 123746
* McARM: Fill in ASMOperand::dump() for memory operands.Daniel Dunbar2011-01-181-1/+56
| | | | llvm-svn: 123745
* McARM: Make ARMOperand use a union where appropriate.Daniel Dunbar2011-01-181-9/+13
| | | | llvm-svn: 123744
* McARM: Unify ParseMemory() successfull return.Daniel Dunbar2011-01-181-40/+22
| | | | llvm-svn: 123740
* McARM: Early exit on failure (NEFC).Daniel Dunbar2011-01-181-7/+8
| | | | llvm-svn: 123739
* McARM: Always keep an offset expression, if used (instead of assuming == 0 ↵Daniel Dunbar2011-01-181-24/+29
| | | | | | | | if used but not present), and simplify logic. Also, clean up various non-sensicalisms in isMemModeRegThumb() and isMemModeImmThumb(). llvm-svn: 123738
* McARM: Add a variety of asserts on the sanity of memory operands.Daniel Dunbar2011-01-181-1/+10
| | | | llvm-svn: 123737
* McARM: Use a consistent marker for not-set OffsetRegNum.Daniel Dunbar2011-01-181-1/+1
| | | | llvm-svn: 123736
* Recognize alternative register names like ip -> r12.Owen Anderson2011-01-131-3/+14
| | | | | | Fixes <rdar://problem/8857982>. llvm-svn: 123409
* Add support to the ARM MC infrastructure to support mcr and friends. This ↵Owen Anderson2011-01-131-5/+77
| | | | | | | | | | | | | | requires supporting the symbolic immediate names used for these instructions, fixing their pretty-printers, and adding proper encoding information for them. With this, we can properly pretty-print and encode assembly like: mrc p15, #0, r3, c13, c0, #3 Fixes <rdar://problem/8857858>. llvm-svn: 123404
* Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target andKevin Enderby2011-01-131-2/+4
| | | | | | directional local labels like 1f and 2b. llvm-svn: 123393
* Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a stepEvan Cheng2011-01-131-22/+16
| | | | | | | | in the right direction. It eliminated some hacks and will unblock codegen work. But it's far from being done. It doesn't reject illegal expressions, e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all. llvm-svn: 123369
* Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 orKevin Enderby2011-01-131-2/+12
| | | | | | | | .code 32 if the TargetMachine's isThumb() boolean does not match. The correct fix is to switch ARM subtargets at that point and is tracked by rdar://8856789 which is bigger task. llvm-svn: 123353
* Change call to Error() to assert()Jason W Kim2011-01-131-4/+1
| | | | llvm-svn: 123350
* Sort the register list based on the *actual* register numbers rather than theBill Wendling2011-01-121-5/+5
| | | | | | enum values we give to them. <rdar://problem/8823730> llvm-svn: 123321
* Workaround for bug 8721.Jason W Kim2011-01-111-0/+106
| | | | | | .s Test added. llvm-svn: 123292
* Clean up ARM subtarget code by using Triple ADT.Evan Cheng2011-01-111-0/+1
| | | | llvm-svn: 123276
* McARM: Fill in GetMnemonicAcceptInfo().Daniel Dunbar2011-01-111-2/+17
| | | | llvm-svn: 123253
* McARM: Sketch some logic for determining when to add carry set and ↵Daniel Dunbar2011-01-111-4/+48
| | | | | | predication code operands based on the "canonical mnemonic". llvm-svn: 123239
* McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out theDaniel Dunbar2011-01-111-11/+32
| | | | | | | | | | carry setting flag from the mnemonic. Note that this currently involves me disabling a number of working cases in arm_instructions.s, this is a hopefully short term evil which will be rapidly fixed (and greatly surpassed), assuming my current approach flies. llvm-svn: 123238
* McARM: Flush out hard coded known non-predicated mnemonic list.Daniel Dunbar2011-01-101-3/+12
| | | | llvm-svn: 123189
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