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path: root/llvm/lib/Target/ARM/ARMScheduleSwift.td
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* [ARM] Remove sched model instregex entries that don't match any instructions ...Simon Pilgrim2018-03-251-17/+17
* [TableGen] When trying to reuse a scheduler class for instructions from an In...Craig Topper2018-03-181-0/+3
* [ARM] Add VLDx/VSTx sched defs for machine-schedulers. NFCIJaved Absar2017-05-241-0/+10
* Cyle -> Cycle; NFCISanjay Patel2017-03-151-4/+4
* [ARM] Classification Improvements to ARM Sched-Models. NFCI.Javed Absar2017-02-221-0/+2
* [ARM] Classification Improvements to ARM Sched-Model. NFCI.Javed Absar2017-02-021-1/+13
* [ARM] Classification Improvements to ARM Sched-Models. NFCI.Javed Absar2017-01-231-4/+24
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-1/+1
* [ARM] Mark Swift MISched model as incompleteJames Molloy2015-10-121-0/+1
* ARM: Enable MachineScheduler and disable PostRAScheduler for swift.Matthias Braun2015-07-171-1038/+0
* ARM: Add scheduling information for LDRLIT instructions to swift scheduling m...Matthias Braun2015-07-171-0/+7
* Revert "ARM: Enable MachineScheduler and disable PostRAScheduler for swift."Adam Nemet2015-07-171-0/+1038
* ARM: Enable MachineScheduler and disable PostRAScheduler for swift.Matthias Braun2015-07-171-1038/+0
* Revert "ARM: Remove Itineraries for swift CPU"Matthias Braun2015-05-121-0/+1046
* ARM: Remove Itineraries for swift CPUMatthias Braun2015-05-121-1046/+0
* Fix known typosAlp Toker2014-01-241-2/+2
* Swift model: Fix uop description on some writesArnold Schwaighofer2013-09-301-2/+11
* Update machine models. Specify buffer sizes for OOO processors.Andrew Trick2013-06-151-1/+1
* ARM sched model: Use the right resources for DIVArnold Schwaighofer2013-06-071-1/+1
* ARM sched model: Add VFP div instruction on SwiftArnold Schwaighofer2013-06-071-0/+16
* ARM sched model: Add SIMD/VFP load/store instructions on SwiftArnold Schwaighofer2013-06-071-0/+364
* Revert "ARM sched model: Add SIMD/VFP load/store instructions on Swift"Arnold Schwaighofer2013-06-061-364/+0
* ARM sched model: Add SIMD/VFP load/store instructions on SwiftArnold Schwaighofer2013-06-061-0/+364
* ARM sched model: Add integer VFP/SIMD instructions on SwiftArnold Schwaighofer2013-06-061-0/+121
* ARM sched model: Add integer load/store instructions on SwiftArnold Schwaighofer2013-06-061-0/+209
* ARM sched model: Add integer arithmetic instructions on SwiftArnold Schwaighofer2013-06-061-0/+155
* ARM sched model: Add divsion, loads, branches, vfp cvtArnold Schwaighofer2013-06-051-5/+63
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-041-927/+5
* ARM sched model: Add VFP div instruction on SwiftArnold Schwaighofer2013-06-041-0/+16
* ARM sched model: Add SIMD/VFP load/store instructions on SwiftArnold Schwaighofer2013-06-041-0/+364
* ARM sched model: Add integer VFP/SIMD instructions on SwiftArnold Schwaighofer2013-06-041-0/+120
* ARM sched model: Add integer load/store instructions on SwiftArnold Schwaighofer2013-06-041-0/+209
* ARM sched model: Add integer arithmetic instructions on SwiftArnold Schwaighofer2013-06-041-0/+155
* ARM sched model: Add divsion, loads, branches, vfp cvtArnold Schwaighofer2013-06-041-5/+63
* ARM scheduler model: Add scheduler info to more instructions and resourceArnold Schwaighofer2013-04-051-5/+9
* ARM scheduler model: Swift has varying latencies, uops for simple ALU opsArnold Schwaighofer2013-04-051-5/+39
* ARM Scheduler Model: Add resources instructions, map resources in subtargetsArnold Schwaighofer2013-04-011-1/+22
* Revert ARM Scheduler Model: Add resources instructions, map resourcesArnold Schwaighofer2013-03-261-22/+1
* ARM Scheduler Model: Add resources instructions, map resources in subtargetsArnold Schwaighofer2013-03-261-1/+22
* Add LLVM support for Swift.Bob Wilson2012-09-291-0/+1085
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