summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov2007-04-161-1/+1
| | | | | | target for tabs checking. llvm-svn: 36146
* Fixed a bug that causes codegen of noop like add r0, r0, #0.Evan Cheng2007-04-031-1/+1
| | | | llvm-svn: 35627
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-201-16/+35
| | | | llvm-svn: 35205
* Fix naming inconsistencies.Evan Cheng2007-03-191-17/+17
| | | | llvm-svn: 35163
* Fix one more Thumb eliminateFrameIndex bug.Evan Cheng2007-03-071-9/+23
| | | | llvm-svn: 34990
* Register scavenging is now on by default for ARM.Evan Cheng2007-03-061-3/+4
| | | | llvm-svn: 34987
* Scavenge a register using the register scavenger when needed.Evan Cheng2007-03-061-8/+107
| | | | llvm-svn: 34966
* eliminate unnecessary reset of SP in epilog on darwinDale Johannesen2007-03-021-1/+1
| | | | llvm-svn: 34824
* Use a spilled free callee-saved register as scratch register.Evan Cheng2007-03-011-3/+17
| | | | llvm-svn: 34785
* - Track which callee-saved registers are spilled.Evan Cheng2007-03-011-10/+18
| | | | | | - Some code clean up. llvm-svn: 34783
* Doh. ARM::PC is obvious a reserved register.Evan Cheng2007-02-281-0/+1
| | | | llvm-svn: 34763
* Make requiresRegisterScavenging determination on a per MachineFunction basis.Evan Cheng2007-02-281-2/+4
| | | | llvm-svn: 34711
* Start making use of RegScavenger.Evan Cheng2007-02-281-8/+12
| | | | llvm-svn: 34708
* Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve ↵Evan Cheng2007-02-271-27/+43
| | | | | | register kill info. llvm-svn: 34692
* bugfix: SP wasn't updated for varargs when frame pointer was eliminated.Lauro Ramos Venancio2007-02-231-63/+63
| | | | llvm-svn: 34537
* Add option to turn on register scavenger; By default, spills kills the ↵Evan Cheng2007-02-231-6/+18
| | | | | | register being stored. llvm-svn: 34514
* Support to provide exception and selector registers.Jim Laskey2007-02-211-0/+10
| | | | llvm-svn: 34482
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-0/+15
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-191-15/+0
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Added getReservedRegs().Evan Cheng2007-02-171-0/+15
| | | | llvm-svn: 34376
* isLowRegister() expects input is a physical register.Evan Cheng2007-02-071-2/+2
| | | | llvm-svn: 34013
* Rename.Evan Cheng2007-02-071-6/+7
| | | | llvm-svn: 34011
* If sp offset will be materialized in a register. Clear the offset field of ↵Evan Cheng2007-02-071-8/+10
| | | | | | str / ldr. llvm-svn: 34010
* Get rid of references to iostream.Evan Cheng2007-02-071-3/+2
| | | | llvm-svn: 34009
* In thumb mode, R3 is reserved, but it can be live in to the function. IfEvan Cheng2007-02-071-5/+21
| | | | | | | | that is the case, whenever we use it as a scratch register, save it to R12 first and then restore it after the use. This is a temporary and truly horrible workaround! llvm-svn: 33999
* - If fp (r7) is used to reference stack objects, use [r, r] address mode.Evan Cheng2007-02-071-28/+67
| | | | | | | | - If there is a dynamic alloca, in the epilogue, restore the value of sp using r7 - offset. - Other bug fixes. llvm-svn: 33997
* eliminateFrameIndex() is even more complicated if frame ptr is used instead ↵Evan Cheng2007-02-071-20/+34
| | | | | | of SP when there are dynamic alloca's. llvm-svn: 33975
* Spill / restore should avoid modifying the condition register.Evan Cheng2007-02-071-34/+35
| | | | llvm-svn: 33971
* foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. ↵Evan Cheng2007-02-061-13/+19
| | | | | | tLDRspi / tSTRspi cannot target / store high registers. llvm-svn: 33958
* eliminateFrameIndex() bug when frame pointer is used as base register.Evan Cheng2007-02-061-23/+27
| | | | llvm-svn: 33945
* bugfix: SP isn't resetted when function has FP and there is no spills.Lauro Ramos Venancio2007-02-021-2/+3
| | | | llvm-svn: 33800
* Another thumb large stack offset codegen bug.Evan Cheng2007-02-021-5/+13
| | | | llvm-svn: 33795
* Ugh. Only meant to do this in thumb mode.Evan Cheng2007-02-021-5/+10
| | | | llvm-svn: 33780
* Also set alignment of stack-based structs to 4 in thumb mode.Evan Cheng2007-02-011-2/+1
| | | | llvm-svn: 33741
* Special epilogue for vararg functions. We cannot do a pop to pc becauseEvan Cheng2007-02-011-4/+20
| | | | | | | | | | | there follows a sp increment for the va register save region. Instead issue a separate pop to another register, increment sp, and then return: pop {r4, r5, r6, r7} pop {r3} add sp, #3 * 4 bx r3 llvm-svn: 33739
* Don't want to add FramePtr to callee save spill list twice.Evan Cheng2007-01-311-8/+2
| | | | llvm-svn: 33727
* Darwin ABI requires FP to point to stack slot of prev FP.Evan Cheng2007-01-311-3/+14
| | | | llvm-svn: 33724
* Update comment.Evan Cheng2007-01-311-1/+1
| | | | llvm-svn: 33721
* ARM fix: Miscompilation when frame pointer can't be eliminated. ↵Lauro Ramos Venancio2007-01-311-10/+9
| | | | | | Uninitialized frame pointer register is used. llvm-svn: 33703
* During PEI, if the immediate value of sp + offset is too large (i.e. somethingEvan Cheng2007-01-301-21/+102
| | | | | | | that would require > 3 instructions to materialize), load the immediate from a constpool entry. llvm-svn: 33667
* In thumb mode, round up stack frame size to multiple of 4 since add/subEvan Cheng2007-01-301-115/+124
| | | | | | sp, imm instructions implicitly multiply the offset by 4. llvm-svn: 33653
* Thumb eliminateFrameIndex fixes.Evan Cheng2007-01-301-8/+27
| | | | llvm-svn: 33652
* - In thumb mode, if size of MachineFunction is >= 2048, force LR to beEvan Cheng2007-01-301-3/+17
| | | | | | | | | | | | | spilled (if it is not already). - If LR is spilled, use BL to implement far jumps. LR is not used as a GPR in thumb mode so it can be clobbered if it is properly spilled / restored in prologue / epilogue. - If LR is force spilled but no far jump has been emitted, try undo'ing the spill by: push lr -> delete pop pc -> bx lr llvm-svn: 33650
* Remember if LR register has been spilled in this function.Evan Cheng2007-01-291-1/+5
| | | | llvm-svn: 33632
* Represent tADDspi and tSUBspi as two-address instructions.Evan Cheng2007-01-261-1/+1
| | | | llvm-svn: 33551
* I am an idiot.Evan Cheng2007-01-251-1/+1
| | | | llvm-svn: 33509
* PEI is now responsible for adding MaxCallFrameSize to frame size and align ↵Evan Cheng2007-01-231-15/+0
| | | | | | the stack. Each target can further adjust the frame size if necessary. llvm-svn: 33460
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-1/+1
| | | | llvm-svn: 33455
* Round up stack to multiple of alignment only if it's a leaf function without ↵Evan Cheng2007-01-201-4/+7
| | | | | | alloca. llvm-svn: 33401
* Prologue and epilogue bugs for non-Darwin targets.Evan Cheng2007-01-201-22/+46
| | | | llvm-svn: 33390
OpenPOWER on IntegriCloud