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path: root/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-141-10/+17
* Reverting, broke some bots. Need further investigation.Diogo Sampaio2020-01-101-17/+10
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-101-10/+17
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-16/+16
* [IR] Refactor attribute methods in Function class (NFC)Evandro Menezes2019-04-041-1/+1
* [ARM] Add missing memory operands to a bunch of instructions.Eli Friedman2019-03-251-20/+46
* [ARM] Be super conservative about atomicsPhilip Reames2019-02-261-2/+5
* [ARM] LoadStoreOptimizer: reoder limitSjoerd Meijer2019-02-111-1/+6
* [ARM] LoadStoreOptimizer: just a clean-up. NFC.Sjoerd Meijer2019-02-111-35/+25
* [ARM] Add OptMinSize to ARMSubtargetSam Parker2019-02-081-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-271-8/+7
* [ARM][ARMLoadStoreOptimizer]Luke Cheeseman2018-09-241-0/+14
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-4/+4
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-2/+2
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-8/+8
* [ARM] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-04-051-8/+8
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-5/+5
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-1/+1
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-1/+1
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-3/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-3/+3
* Move TargetFrameLowering.h to CodeGen where it's implementedDavid Blaikie2017-11-031-1/+1
* ARM: Fix cases where CSI Restored bit is not clearedMatthias Braun2017-09-281-0/+11
* [ARM] Fix some Clang-tidy modernize-use-using and Include What You Use warnin...Eugene Zelenko2017-09-201-25/+58
* Fix ARMv4 supportJoerg Sonnenberger2017-08-281-0/+1
* [ARM] Fix bug in ARMLoadStoreOptimizer when kill flags are missing.Geoff Berry2017-08-281-30/+19
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [ARM] Use alias analysis in ARMPreAllocLoadStoreOpt.Eli Friedman2017-03-171-16/+14
* [ARM] Fix insert point for store rescheduling.Eli Friedman2017-03-021-12/+19
* Revert r296708; causing test failures on ARM hosts.Eli Friedman2017-03-021-18/+12
* [ARM] Fix insert point for store rescheduling.Eli Friedman2017-03-011-12/+18
* [ARM] Check correct instructions for load/store rescheduling.Eli Friedman2017-03-011-1/+1
* [ARM] Don't generate deprecated T1 STM.Eli Friedman2017-02-281-4/+3
* [ARM] Use helpers for adding pred / CC operands. NFCDiana Picus2017-01-201-16/+28
* [ARM] CodeGen: Replace AddDefaultT1CC and AddNoT1CC. NFCDiana Picus2017-01-131-9/+18
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-6/+4
* [ARM] CodeGen: Remove AddDefaultPred. NFC.Diana Picus2017-01-131-2/+3
* LivePhysReg: Use reference instead of pointer in init(); NFCMatthias Braun2016-12-081-1/+1
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-4/+2
* Handle empty functions with debug info in load/store opt passPablo Barrio2016-08-261-1/+1
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun2016-08-251-1/+1
* Use the range variant of find instead of unpacking begin/endDavid Majnemer2016-08-111-1/+1
* ARM: Initialize LoadStore passes in TargetMachineMatthias Braun2016-07-161-16/+5
* ARM: Remove implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-46/+46
* [ARM] Do not test for CPUs, use SubtargetFeatures (Part 3). NFCIDiana Picus2016-07-061-1/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-30/+33
* [ARM] Transform LDMs into writeback form to save code sizeJames Molloy2016-06-071-3/+23
* livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFCMatthias Braun2016-05-031-1/+1
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